================================================================
== Vivado HLS Report for 'apint_arith'
================================================================
* Date:           Mon Mar  5 09:40:36 2018

* Version:        2017.4 (Build 2086221 on Fri Dec 15 21:13:33 MST 2017)
* Project:        vivado_test
* Solution:       solution1
* Product family: zynq
* Target device:  xc7z020clg484-1


================================================================
== Performance Estimates
================================================================
+ Timing (ns): 
    * Summary: 
    +--------+-------+----------+------------+
    |  Clock | Target| Estimated| Uncertainty|
    +--------+-------+----------+------------+
    |ap_clk  |  10.00|      6.38|        1.25|
    +--------+-------+----------+------------+

+ Latency (clock cycles): 
    * Summary: 
    +-----+-----+-----+-----+---------+
    |  Latency  |  Interval | Pipeline|
    | min | max | min | max |   Type  |
    +-----+-----+-----+-----+---------+
    |   67|   67|   67|   67|   none  |
    +-----+-----+-----+-----+---------+

    + Detail: 
        * Instance: 
        N/A

        * Loop: 
        N/A



================================================================
== Utilization Estimates
================================================================
* Summary: 
+-----------------+---------+-------+--------+-------+
|       Name      | BRAM_18K| DSP48E|   FF   |  LUT  |
+-----------------+---------+-------+--------+-------+
|DSP              |        -|      1|       -|      -|
|Expression       |        -|      -|       0|     24|
|FIFO             |        -|      -|       -|      -|
|Instance         |        -|      -|    1173|    707|
|Memory           |        -|      -|       -|      -|
|Multiplexer      |        -|      -|       -|    309|
|Register         |        -|      -|      68|      -|
+-----------------+---------+-------+--------+-------+
|Total            |        0|      1|    1241|   1040|
+-----------------+---------+-------+--------+-------+
|Available        |      280|    220|  106400|  53200|
+-----------------+---------+-------+--------+-------+
|Utilization (%)  |        0|   ~0  |       1|      1|
+-----------------+---------+-------+--------+-------+

+ Detail: 
    * Instance: 
    +-------------------------+----------------------+---------+-------+-----+-----+
    |         Instance        |        Module        | BRAM_18K| DSP48E|  FF | LUT |
    +-------------------------+----------------------+---------+-------+-----+-----+
    |apint_arith_sdiv_cud_U2  |apint_arith_sdiv_cud  |        0|      0|  394|  238|
    |apint_arith_srem_bkb_U1  |apint_arith_srem_bkb  |        0|      0|  779|  469|
    +-------------------------+----------------------+---------+-------+-----+-----+
    |Total                    |                      |        0|      0| 1173|  707|
    +-------------------------+----------------------+---------+-------+-----+-----+

    * DSP48: 
    +-------------------------+----------------------+-----------+
    |         Instance        |        Module        | Expression|
    +-------------------------+----------------------+-----------+
    |apint_arith_mul_mdEe_U3  |apint_arith_mul_mdEe  |  i0 * i1  |
    +-------------------------+----------------------+-----------+

    * Memory: 
    N/A

    * FIFO: 
    N/A

    * Expression: 
    +-----------------+----------+-------+---+----+------------+------------+
    |  Variable Name  | Operation| DSP48E| FF| LUT| Bitwidth P0| Bitwidth P1|
    +-----------------+----------+-------+---+----+------------+------------+
    |tmp_3_fu_125_p2  |     +    |      0|  0|  24|          17|          17|
    +-----------------+----------+-------+---+----+------------+------------+
    |Total            |          |      0|  0|  24|          17|          17|
    +-----------------+----------+-------+---+----+------------+------------+

    * Multiplexer: 
    +-----------+-----+-----------+-----+-----------+
    |    Name   | LUT | Input Size| Bits| Total Bits|
    +-----------+-----+-----------+-----+-----------+
    |ap_NS_fsm  |  309|         69|    1|         69|
    +-----------+-----+-----------+-----+-----------+
    |Total      |  309|         69|    1|         69|
    +-----------+-----+-----------+-----+-----------+

    * Register: 
    +-----------+----+----+-----+-----------+
    |    Name   | FF | LUT| Bits| Const Bits|
    +-----------+----+----+-----+-----------+
    |ap_CS_fsm  |  68|   0|   68|          0|
    +-----------+----+----+-----+-----------+
    |Total      |  68|   0|   68|          0|
    +-----------+----+----+-----+-----------+



================================================================
== Interface
================================================================
* Summary: 
+-------------+-----+-----+------------+--------------+--------------+
|  RTL Ports  | Dir | Bits|  Protocol  | Source Object|    C Type    |
+-------------+-----+-----+------------+--------------+--------------+
|ap_clk       |  in |    1| ap_ctrl_hs |  apint_arith | return value |
|ap_rst       |  in |    1| ap_ctrl_hs |  apint_arith | return value |
|ap_start     |  in |    1| ap_ctrl_hs |  apint_arith | return value |
|ap_done      | out |    1| ap_ctrl_hs |  apint_arith | return value |
|ap_idle      | out |    1| ap_ctrl_hs |  apint_arith | return value |
|ap_ready     | out |    1| ap_ctrl_hs |  apint_arith | return value |
|inA          |  in |    8|   ap_none  |      inA     |    scalar    |
|inB          |  in |   16|   ap_none  |      inB     |    scalar    |
|inC          |  in |   32|   ap_none  |      inC     |    scalar    |
|inD          |  in |   64|   ap_none  |      inD     |    scalar    |
|out1         | out |   32|   ap_vld   |     out1     |    pointer   |
|out1_ap_vld  | out |    1|   ap_vld   |     out1     |    pointer   |
|out2         | out |   32|   ap_vld   |     out2     |    pointer   |
|out2_ap_vld  | out |    1|   ap_vld   |     out2     |    pointer   |
|out3         | out |   32|   ap_vld   |     out3     |    pointer   |
|out3_ap_vld  | out |    1|   ap_vld   |     out3     |    pointer   |
|out4         | out |   64|   ap_vld   |     out4     |    pointer   |
|out4_ap_vld  | out |    1|   ap_vld   |     out4     |    pointer   |
+-------------+-----+-----+------------+--------------+--------------+