; ModuleID = '/home/hakta/Documents/vector_mult/solution2/.autopilot/db/a.o.2.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@vector_mult.str = internal unnamed_addr constant [12 x i8] c"vector_mult\00" ; [#uses=1 type=[12 x i8]*]
@memcpy_OC_tempB_OC_B.str = internal unnamed_addr constant [15 x i8] c"memcpy.tempB.B\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_tempA_OC_A.str = internal unnamed_addr constant [15 x i8] c"memcpy.tempA.A\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_result_OC_tempResult_OC_gep.str = internal unnamed_addr constant [29 x i8] c"memcpy.result.tempResult.gep\00" ; [#uses=1 type=[29 x i8]*]
@burstwrite_OC_region.str = internal unnamed_addr constant [18 x i8] c"burstwrite.region\00" ; [#uses=2 type=[18 x i8]*]
@burstread_OC_region.str = internal unnamed_addr constant [17 x i8] c"burstread.region\00" ; [#uses=4 type=[17 x i8]*]
@.str7 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@.str6 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@.str5 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@.str4 = private unnamed_addr constant [17 x i8] c"vector_mult_loop\00", align 1 ; [#uses=3 type=[17 x i8]*]
@.str3 = private unnamed_addr constant [6 x i8] c"slave\00", align 1 ; [#uses=3 type=[6 x i8]*]
@.str2 = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1 ; [#uses=3 type=[6 x i8]*]
@.str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 ; [#uses=22 type=[1 x i8]*]
@.str = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1 ; [#uses=1 type=[10 x i8]*]

; [#uses=0]
define void @vector_mult([8 x i32]* %A, [8 x i32]* %B, [8 x i32]* %result) nounwind uwtable {
  call void (...)* @_ssdm_op_SpecBitsMap([8 x i32]* %A) nounwind, !map !20
  call void (...)* @_ssdm_op_SpecBitsMap([8 x i32]* %B) nounwind, !map !26
  call void (...)* @_ssdm_op_SpecBitsMap([8 x i32]* %result) nounwind, !map !30
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @vector_mult.str) nounwind
  %tempA = alloca [8 x i32], align 16             ; [#uses=5 type=[8 x i32]*]
  %tempB = alloca [8 x i32], align 16             ; [#uses=5 type=[8 x i32]*]
  %tempResult = alloca [8 x i32], align 16        ; [#uses=5 type=[8 x i32]*]
  call void @llvm.dbg.value(metadata !{[8 x i32]* %A}, i64 0, metadata !34), !dbg !38 ; [debug line = 4:22] [debug variable = A]
  call void @llvm.dbg.value(metadata !{[8 x i32]* %B}, i64 0, metadata !39), !dbg !40 ; [debug line = 4:32] [debug variable = B]
  call void @llvm.dbg.value(metadata !{[8 x i32]* %result}, i64 0, metadata !41), !dbg !42 ; [debug line = 4:42] [debug variable = result]
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 0, [1 x i8]* @.str1, [1 x i8]* @.str1, [1 x i8]* @.str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind, !dbg !43 ; [debug line = 5:1]
  call void (...)* @_ssdm_op_SpecInterface([8 x i32]* %result, [6 x i8]* @.str2, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str3, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind
  call void (...)* @_ssdm_op_SpecInterface([8 x i32]* %B, [6 x i8]* @.str2, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str3, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind
  call void (...)* @_ssdm_op_SpecInterface([8 x i32]* %A, [6 x i8]* @.str2, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str3, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind
  call void @llvm.dbg.declare(metadata !{[8 x i32]* %tempA}, metadata !45), !dbg !46 ; [debug line = 5:6] [debug variable = tempA]
  call void @llvm.dbg.declare(metadata !{[8 x i32]* %tempB}, metadata !47), !dbg !48 ; [debug line = 5:16] [debug variable = tempB]
  call void @llvm.dbg.declare(metadata !{[8 x i32]* %tempResult}, metadata !49), !dbg !50 ; [debug line = 5:26] [debug variable = tempResult]
  br label %burst.rd.header

burst.rd.header:                                  ; preds = %burst.rd.body, %0
  %indvar = phi i4 [ 0, %0 ], [ %indvar.next, %burst.rd.body ] ; [#uses=3 type=i4]
  %exitcond1 = icmp eq i4 %indvar, -8             ; [#uses=1 type=i1]
  %1 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32]
  br i1 %exitcond1, label %burst.rd.header5.preheader, label %burst.rd.body

burst.rd.header5.preheader:                       ; preds = %burst.rd.header
  br label %burst.rd.header5

burst.rd.body:                                    ; preds = %burst.rd.header
  %burstread.rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region.str) nounwind ; [#uses=1 type=i32]
  %2 = call i32 (...)* @_ssdm_op_SpecBurst([8 x i32]* %A, i32 1, i32 8, i32 1) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str5)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempA_OC_A.str)
  %indvar.next = add i4 %indvar, 1                ; [#uses=1 type=i4]
  %tmp = zext i4 %indvar to i64, !dbg !51         ; [#uses=2 type=i64] [debug line = 6:2]
  %A.addr = getelementptr [8 x i32]* %A, i64 0, i64 %tmp, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2]
  %A.load = load i32* %A.addr, align 4, !dbg !51  ; [#uses=1 type=i32] [debug line = 6:2]
  %tempA.addr = getelementptr [8 x i32]* %tempA, i64 0, i64 %tmp, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2]
  store i32 %A.load, i32* %tempA.addr, align 4, !dbg !51 ; [debug line = 6:2]
  %burstread.rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region.str, i32 %burstread.rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header

burst.rd.header5:                                 ; preds = %burst.rd.body6, %burst.rd.header5.preheader
  %indvar7 = phi i4 [ %indvar.next8, %burst.rd.body6 ], [ 0, %burst.rd.header5.preheader ] ; [#uses=3 type=i4]
  %exitcond9 = icmp eq i4 %indvar7, -8            ; [#uses=1 type=i1]
  %3 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32]
  br i1 %exitcond9, label %burst.rd.end4.0.preheader, label %burst.rd.body6

burst.rd.end4.0.preheader:                        ; preds = %burst.rd.header5
  br label %burst.rd.end4.0

burst.rd.body6:                                   ; preds = %burst.rd.header5
  %burstread.rbegin1 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region.str) nounwind ; [#uses=1 type=i32]
  %4 = call i32 (...)* @_ssdm_op_SpecBurst([8 x i32]* %B, i32 1, i32 8, i32 1) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str6)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempB_OC_B.str)
  %indvar.next8 = add i4 %indvar7, 1              ; [#uses=1 type=i4]
  %tmp.1 = zext i4 %indvar7 to i64, !dbg !52      ; [#uses=2 type=i64] [debug line = 7:2]
  %B.addr = getelementptr [8 x i32]* %B, i64 0, i64 %tmp.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 7:2]
  %B.load = load i32* %B.addr, align 4, !dbg !52  ; [#uses=1 type=i32] [debug line = 7:2]
  %tempB.addr = getelementptr [8 x i32]* %tempB, i64 0, i64 %tmp.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 7:2]
  store i32 %B.load, i32* %tempB.addr, align 4, !dbg !52 ; [debug line = 7:2]
  %burstread.rend12 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region.str, i32 %burstread.rbegin1) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header5

burst.rd.end4.0:                                  ; preds = %burst.rd.end4.1, %burst.rd.end4.0.preheader
  %i = phi i4 [ %i.1.3, %burst.rd.end4.1 ], [ 0, %burst.rd.end4.0.preheader ] ; [#uses=4 type=i4]
  %i.cast3 = trunc i4 %i to i3                    ; [#uses=3 type=i3]
  %5 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 2, i64 2, i64 2) nounwind ; [#uses=0 type=i32]
  %exitcond = icmp eq i4 %i, -8, !dbg !53         ; [#uses=1 type=i1] [debug line = 8:33]
  br i1 %exitcond, label %burst.wr.header.preheader, label %burst.rd.end4.1, !dbg !53 ; [debug line = 8:33]

burst.wr.header.preheader:                        ; preds = %burst.rd.end4.0
  br label %burst.wr.header

burst.rd.end4.1:                                  ; preds = %burst.rd.end4.0
  call void (...)* @_ssdm_op_SpecLoopName([17 x i8]* @.str4) nounwind, !dbg !55 ; [debug line = 10:2]
  %tmp.2 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @.str4) nounwind, !dbg !55 ; [#uses=1 type=i32] [debug line = 10:2]
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @.str1) nounwind, !dbg !57 ; [debug line = 10:1]
  %tmp. = zext i4 %i to i64, !dbg !58             ; [#uses=3 type=i64] [debug line = 9:1]
  %tempA.addr.1 = getelementptr inbounds [8 x i32]* %tempA, i64 0, i64 %tmp., !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempA.load = load i32* %tempA.addr.1, align 16, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempB.addr.1 = getelementptr inbounds [8 x i32]* %tempB, i64 0, i64 %tmp., !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempB.load = load i32* %tempB.addr.1, align 16, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tmp.3 = mul nsw i32 %tempB.load, %tempA.load, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempResult.addr = getelementptr inbounds [8 x i32]* %tempResult, i64 0, i64 %tmp., !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  store i32 %tmp.3, i32* %tempResult.addr, align 16, !dbg !58 ; [debug line = 9:1]
  %6 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @.str4, i32 %tmp.2) nounwind, !dbg !59 ; [#uses=0 type=i32] [debug line = 9:35]
  %i.1. = or i3 %i.cast3, 1, !dbg !60             ; [#uses=1 type=i3] [debug line = 8:42]
  %tmp.2.1 = zext i3 %i.1. to i64, !dbg !58       ; [#uses=3 type=i64] [debug line = 9:1]
  %tempA.addr.2 = getelementptr inbounds [8 x i32]* %tempA, i64 0, i64 %tmp.2.1, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempA.load.1 = load i32* %tempA.addr.2, align 4, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempB.addr.2 = getelementptr inbounds [8 x i32]* %tempB, i64 0, i64 %tmp.2.1, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempB.load.1 = load i32* %tempB.addr.2, align 4, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tmp.3.1 = mul nsw i32 %tempB.load.1, %tempA.load.1, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempResult.addr.4 = getelementptr inbounds [8 x i32]* %tempResult, i64 0, i64 %tmp.2.1, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  store i32 %tmp.3.1, i32* %tempResult.addr.4, align 4, !dbg !58 ; [debug line = 9:1]
  %i.1.1 = or i3 %i.cast3, 2, !dbg !60            ; [#uses=1 type=i3] [debug line = 8:42]
  %tmp.2.2 = zext i3 %i.1.1 to i64, !dbg !58      ; [#uses=3 type=i64] [debug line = 9:1]
  %tempA.addr.3 = getelementptr inbounds [8 x i32]* %tempA, i64 0, i64 %tmp.2.2, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempA.load.2 = load i32* %tempA.addr.3, align 8, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempB.addr.3 = getelementptr inbounds [8 x i32]* %tempB, i64 0, i64 %tmp.2.2, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempB.load.2 = load i32* %tempB.addr.3, align 8, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tmp.3.2 = mul nsw i32 %tempB.load.2, %tempA.load.2, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempResult.addr.2 = getelementptr inbounds [8 x i32]* %tempResult, i64 0, i64 %tmp.2.2, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  store i32 %tmp.3.2, i32* %tempResult.addr.2, align 8, !dbg !58 ; [debug line = 9:1]
  %i.1.2 = or i3 %i.cast3, 3, !dbg !60            ; [#uses=1 type=i3] [debug line = 8:42]
  %tmp.2.3 = zext i3 %i.1.2 to i64, !dbg !58      ; [#uses=3 type=i64] [debug line = 9:1]
  %tempA.addr.4 = getelementptr inbounds [8 x i32]* %tempA, i64 0, i64 %tmp.2.3, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempA.load.3 = load i32* %tempA.addr.4, align 4, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempB.addr.4 = getelementptr inbounds [8 x i32]* %tempB, i64 0, i64 %tmp.2.3, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  %tempB.load.3 = load i32* %tempB.addr.4, align 4, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tmp.3.3 = mul nsw i32 %tempB.load.3, %tempA.load.3, !dbg !58 ; [#uses=1 type=i32] [debug line = 9:1]
  %tempResult.addr.3 = getelementptr inbounds [8 x i32]* %tempResult, i64 0, i64 %tmp.2.3, !dbg !58 ; [#uses=1 type=i32*] [debug line = 9:1]
  store i32 %tmp.3.3, i32* %tempResult.addr.3, align 4, !dbg !58 ; [debug line = 9:1]
  %i.1.3 = add i4 %i, 4, !dbg !60                 ; [#uses=1 type=i4] [debug line = 8:42]
  br label %burst.rd.end4.0, !dbg !60             ; [debug line = 8:42]

burst.wr.header:                                  ; preds = %burst.wr.body, %burst.wr.header.preheader
  %indvar1 = phi i4 [ %indvar.next1, %burst.wr.body ], [ 0, %burst.wr.header.preheader ] ; [#uses=3 type=i4]
  %exitcond2 = icmp eq i4 %indvar1, -8            ; [#uses=1 type=i1]
  %7 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32]
  br i1 %exitcond2, label %memcpy.tail, label %burst.wr.body

burst.wr.body:                                    ; preds = %burst.wr.header
  %burstwrite.rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([18 x i8]* @burstwrite_OC_region.str) nounwind ; [#uses=1 type=i32]
  %8 = call i32 (...)* @_ssdm_op_SpecBurst([8 x i32]* %result, i32 0, i32 8, i32 1) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str7)
  call void (...)* @_ssdm_op_SpecLoopName([29 x i8]* @memcpy_OC_result_OC_tempResult_OC_gep.str)
  %indvar.next1 = add i4 %indvar1, 1              ; [#uses=1 type=i4]
  %tmp.5 = zext i4 %indvar1 to i64, !dbg !61      ; [#uses=2 type=i64] [debug line = 10:2]
  %tempResult.addr.1 = getelementptr [8 x i32]* %tempResult, i64 0, i64 %tmp.5, !dbg !61 ; [#uses=1 type=i32*] [debug line = 10:2]
  %tempResult.load = load i32* %tempResult.addr.1, align 4, !dbg !61 ; [#uses=1 type=i32] [debug line = 10:2]
  %result.addr = getelementptr [8 x i32]* %result, i64 0, i64 %tmp.5, !dbg !61 ; [#uses=1 type=i32*] [debug line = 10:2]
  store i32 %tempResult.load, i32* %result.addr, align 4, !dbg !61 ; [debug line = 10:2]
  %burstwrite.rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([18 x i8]* @burstwrite_OC_region.str, i32 %burstwrite.rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.wr.header

memcpy.tail:                                      ; preds = %burst.wr.header
  ret void, !dbg !62                              ; [debug line = 11:1]
}

; [#uses=3]
declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

; [#uses=3]
declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone

; [#uses=1]
declare void @_ssdm_op_SpecTopModule(...)

; [#uses=4]
declare i32 @_ssdm_op_SpecRegionEnd(...)

; [#uses=4]
declare i32 @_ssdm_op_SpecRegionBegin(...)

; [#uses=4]
declare void @_ssdm_op_SpecPipeline(...) nounwind

; [#uses=4]
declare i32 @_ssdm_op_SpecLoopTripCount(...)

; [#uses=4]
declare void @_ssdm_op_SpecLoopName(...) nounwind

; [#uses=4]
declare void @_ssdm_op_SpecInterface(...) nounwind

; [#uses=3]
declare i32 @_ssdm_op_SpecBurst(...)

; [#uses=3]
declare void @_ssdm_op_SpecBitsMap(...)

!llvm.dbg.cu = !{!0}
!opencl.kernels = !{!13}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}

!0 = metadata !{i32 786449, i32 0, i32 4, metadata !"/home/hakta/Documents/vector_mult/solution2/.autopilot/db/vector_mult.pragma.2.cpp", metadata !"/home/hakta/Documents", metadata !"clang version 3.1 ", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ]
!1 = metadata !{metadata !2}
!2 = metadata !{i32 0}
!3 = metadata !{metadata !4}
!4 = metadata !{metadata !5}
!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"vector_mult", metadata !"vector_mult", metadata !"_Z11vector_multPiS_S_", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !11, i32 4} ; [ DW_TAG_subprogram ]
!6 = metadata !{i32 786473, metadata !"vector_mult/vector_mult.cpp", metadata !"/home/hakta/Documents", null} ; [ DW_TAG_file_type ]
!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
!8 = metadata !{null, metadata !9, metadata !9, metadata !9}
!9 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ]
!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
!11 = metadata !{metadata !12}
!12 = metadata !{i32 786468}                      ; [ DW_TAG_base_type ]
!13 = metadata !{null, metadata !14, metadata !15, metadata !16, metadata !17, metadata !18, metadata !19}
!14 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1, i32 1}
!15 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none"}
!16 = metadata !{metadata !"kernel_arg_type", metadata !"int*", metadata !"int*", metadata !"int*"}
!17 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !""}
!18 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B", metadata !"result"}
!19 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!20 = metadata !{metadata !21}
!21 = metadata !{i32 0, i32 31, metadata !22}
!22 = metadata !{metadata !23}
!23 = metadata !{metadata !"A", metadata !24, metadata !"int", i32 0, i32 31}
!24 = metadata !{metadata !25}
!25 = metadata !{i32 0, i32 7, i32 1}
!26 = metadata !{metadata !27}
!27 = metadata !{i32 0, i32 31, metadata !28}
!28 = metadata !{metadata !29}
!29 = metadata !{metadata !"B", metadata !24, metadata !"int", i32 0, i32 31}
!30 = metadata !{metadata !31}
!31 = metadata !{i32 0, i32 31, metadata !32}
!32 = metadata !{metadata !33}
!33 = metadata !{metadata !"result", metadata !24, metadata !"int", i32 0, i32 31}
!34 = metadata !{i32 786689, metadata !5, metadata !"A", null, i32 4, metadata !35, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!35 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 256, i64 32, i32 0, i32 0, metadata !10, metadata !36, i32 0, i32 0} ; [ DW_TAG_array_type ]
!36 = metadata !{metadata !37}
!37 = metadata !{i32 786465, i64 0, i64 7}        ; [ DW_TAG_subrange_type ]
!38 = metadata !{i32 4, i32 22, metadata !5, null}
!39 = metadata !{i32 786689, metadata !5, metadata !"B", null, i32 4, metadata !35, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!40 = metadata !{i32 4, i32 32, metadata !5, null}
!41 = metadata !{i32 786689, metadata !5, metadata !"result", null, i32 4, metadata !35, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!42 = metadata !{i32 4, i32 42, metadata !5, null}
!43 = metadata !{i32 5, i32 1, metadata !44, null}
!44 = metadata !{i32 786443, metadata !5, i32 4, i32 53, metadata !6, i32 0} ; [ DW_TAG_lexical_block ]
!45 = metadata !{i32 786688, metadata !44, metadata !"tempA", metadata !6, i32 5, metadata !35, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!46 = metadata !{i32 5, i32 6, metadata !44, null}
!47 = metadata !{i32 786688, metadata !44, metadata !"tempB", metadata !6, i32 5, metadata !35, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!48 = metadata !{i32 5, i32 16, metadata !44, null}
!49 = metadata !{i32 786688, metadata !44, metadata !"tempResult", metadata !6, i32 5, metadata !35, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!50 = metadata !{i32 5, i32 26, metadata !44, null}
!51 = metadata !{i32 6, i32 2, metadata !44, null}
!52 = metadata !{i32 7, i32 2, metadata !44, null}
!53 = metadata !{i32 8, i32 33, metadata !54, null}
!54 = metadata !{i32 786443, metadata !44, i32 8, i32 19, metadata !6, i32 1} ; [ DW_TAG_lexical_block ]
!55 = metadata !{i32 10, i32 2, metadata !56, null}
!56 = metadata !{i32 786443, metadata !54, i32 10, i32 1, metadata !6, i32 2} ; [ DW_TAG_lexical_block ]
!57 = metadata !{i32 10, i32 1, metadata !56, null}
!58 = metadata !{i32 9, i32 1, metadata !56, null}
!59 = metadata !{i32 9, i32 35, metadata !56, null}
!60 = metadata !{i32 8, i32 42, metadata !54, null}
!61 = metadata !{i32 10, i32 2, metadata !44, null}
!62 = metadata !{i32 11, i32 1, metadata !44, null}