Folder Path
/
MSc
/
HLS-FPGA
/
vector_mult
/
solution1
/
impl
/
verilog
/
4
directories
9
files
199 KiB
total
List
Grid
Name
Size
Modified
Up
.Xil/
—
05/17/2022 08:13:47 PM +00:00
project.cache/
—
05/17/2022 08:15:38 PM +00:00
project.hw/
—
05/17/2022 08:15:38 PM +00:00
project.ip_user_files/
—
05/17/2022 08:13:47 PM +00:00
extraction.tcl
62 KiB
05/17/2022 08:15:38 PM +00:00
impl.sh
399 B
05/17/2022 08:15:38 PM +00:00
project.xpr
6.9 KiB
05/17/2022 08:15:38 PM +00:00
run_vivado.tcl
2.1 KiB
05/17/2022 08:15:38 PM +00:00
settings.tcl
572 B
05/17/2022 08:15:38 PM +00:00
vector_mult.v
33 KiB
05/17/2022 08:15:38 PM +00:00
vector_mult.xdc
176 B
05/17/2022 08:15:38 PM +00:00
vector_mult_AXILiteS_s_axi.v
11 KiB
05/17/2022 08:15:38 PM +00:00
vector_mult_gmem_m_axi.v
83 KiB
05/17/2022 08:15:38 PM +00:00