#----------------------------------------------------------- # Vivado v2017.4 (64-bit) # SW Build 2086221 on Fri Dec 15 20:54:30 MST 2017 # IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017 # Start of session at: Fri Feb 16 17:07:10 2018 # Process ID: 18547 # Current directory: /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1 # Command line: vivado -log design_1_wrapper.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source design_1_wrapper.tcl # Log file: /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/design_1_wrapper.vds # Journal file: /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/vivado.jou #----------------------------------------------------------- source design_1_wrapper.tcl -notrace INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2017.4/data/ip'. Command: synth_design -top design_1_wrapper -part xc7z020clg484-1 Starting synth_design Attempting to get a license for feature 'Synthesis' and/or device 'xc7z020' INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7z020' INFO: Launching helper process for spawning children vivado processes INFO: Helper process launched with PID 18556 --------------------------------------------------------------------------------- Starting RTL Elaboration : Time (s): cpu = 00:00:08 ; elapsed = 00:00:09 . Memory (MB): peak = 1316.285 ; gain = 88.988 ; free physical = 2135 ; free virtual = 25403 --------------------------------------------------------------------------------- INFO: [Synth 8-638] synthesizing module 'design_1_wrapper' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:43] INFO: [Synth 8-3491] module 'design_1' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1089' bound to instance 'design_1_i' of component 'design_1' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:73] INFO: [Synth 8-638] synthesizing module 'design_1' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1122] INFO: [Synth 8-3491] module 'design_1_axi_gpio_0_0' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_axi_gpio_0_0_stub.vhdl:5' bound to instance 'axi_gpio_0' of component 'design_1_axi_gpio_0_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1401] INFO: [Synth 8-638] synthesizing module 'design_1_axi_gpio_0_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_axi_gpio_0_0_stub.vhdl:31] INFO: [Synth 8-3491] module 'design_1_axi_gpio_1_0' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_axi_gpio_1_0_stub.vhdl:5' bound to instance 'axi_gpio_1' of component 'design_1_axi_gpio_1_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1424] INFO: [Synth 8-638] synthesizing module 'design_1_axi_gpio_1_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_axi_gpio_1_0_stub.vhdl:33] INFO: [Synth 8-3491] module 'design_1_processing_system7_0_0' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_processing_system7_0_0_stub.vhdl:5' bound to instance 'processing_system7_0' of component 'design_1_processing_system7_0_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1449] INFO: [Synth 8-638] synthesizing module 'design_1_processing_system7_0_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_processing_system7_0_0_stub.vhdl:80] INFO: [Synth 8-638] synthesizing module 'design_1_ps7_0_axi_periph_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:617] INFO: [Synth 8-638] synthesizing module 'm00_couplers_imp_15SPJYW' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:57] INFO: [Synth 8-256] done synthesizing module 'm00_couplers_imp_15SPJYW' (1#1) [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:57] INFO: [Synth 8-638] synthesizing module 'm01_couplers_imp_XU9C55' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:158] INFO: [Synth 8-256] done synthesizing module 'm01_couplers_imp_XU9C55' (2#1) [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:158] INFO: [Synth 8-638] synthesizing module 's00_couplers_imp_UYSKKA' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:282] INFO: [Synth 8-3491] module 'design_1_auto_pc_0' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_auto_pc_0_stub.vhdl:5' bound to instance 'auto_pc' of component 'design_1_auto_pc_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:465] INFO: [Synth 8-638] synthesizing module 'design_1_auto_pc_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_auto_pc_0_stub.vhdl:70] INFO: [Synth 8-256] done synthesizing module 's00_couplers_imp_UYSKKA' (3#1) [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:282] INFO: [Synth 8-3491] module 'design_1_xbar_0' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_xbar_0_stub.vhdl:5' bound to instance 'xbar' of component 'design_1_xbar_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1024] INFO: [Synth 8-638] synthesizing module 'design_1_xbar_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_xbar_0_stub.vhdl:51] INFO: [Synth 8-256] done synthesizing module 'design_1_ps7_0_axi_periph_0' (4#1) [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:617] INFO: [Synth 8-3491] module 'design_1_rst_ps7_0_100M_0' declared at '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_rst_ps7_0_100M_0_stub.vhdl:5' bound to instance 'rst_ps7_0_100M' of component 'design_1_rst_ps7_0_100M_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1604] INFO: [Synth 8-638] synthesizing module 'design_1_rst_ps7_0_100M_0' [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/realtime/design_1_rst_ps7_0_100M_0_stub.vhdl:21] INFO: [Synth 8-256] done synthesizing module 'design_1' (5#1) [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/synth/design_1.vhd:1122] INFO: [Synth 8-256] done synthesizing module 'design_1_wrapper' (6#1) [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.vhd:43] WARNING: [Synth 8-3331] design s00_couplers_imp_UYSKKA has unconnected port M_ACLK WARNING: [Synth 8-3331] design s00_couplers_imp_UYSKKA has unconnected port M_ARESETN WARNING: [Synth 8-3331] design m01_couplers_imp_XU9C55 has unconnected port M_ACLK WARNING: [Synth 8-3331] design m01_couplers_imp_XU9C55 has unconnected port M_ARESETN WARNING: [Synth 8-3331] design m01_couplers_imp_XU9C55 has unconnected port S_ACLK WARNING: [Synth 8-3331] design m01_couplers_imp_XU9C55 has unconnected port S_ARESETN WARNING: [Synth 8-3331] design m00_couplers_imp_15SPJYW has unconnected port M_ACLK WARNING: [Synth 8-3331] design m00_couplers_imp_15SPJYW has unconnected port M_ARESETN WARNING: [Synth 8-3331] design m00_couplers_imp_15SPJYW has unconnected port S_ACLK WARNING: [Synth 8-3331] design m00_couplers_imp_15SPJYW has unconnected port S_ARESETN --------------------------------------------------------------------------------- Finished RTL Elaboration : Time (s): cpu = 00:00:09 ; elapsed = 00:00:10 . Memory (MB): peak = 1358.824 ; gain = 131.527 ; free physical = 2148 ; free virtual = 25416 --------------------------------------------------------------------------------- Report Check Netlist: +------+------------------+-------+---------+-------+------------------+ | |Item |Errors |Warnings |Status |Description | +------+------------------+-------+---------+-------+------------------+ |1 |multi_driven_nets | 0| 0|Passed |Multi driven nets | +------+------------------+-------+---------+-------+------------------+ --------------------------------------------------------------------------------- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:09 ; elapsed = 00:00:10 . Memory (MB): peak = 1358.824 ; gain = 131.527 ; free physical = 2149 ; free virtual = 25416 --------------------------------------------------------------------------------- INFO: [Device 21-403] Loading part xc7z020clg484-1 INFO: [Project 1-570] Preparing netlist for logic optimization Processing XDC Constraints Initializing timing engine Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc] for cell 'design_1_i/processing_system7_0' Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc] for cell 'design_1_i/processing_system7_0' Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp7/design_1_axi_gpio_0_0_in_context.xdc] for cell 'design_1_i/axi_gpio_0' Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp7/design_1_axi_gpio_0_0_in_context.xdc] for cell 'design_1_i/axi_gpio_0' Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp8/design_1_axi_gpio_1_0_in_context.xdc] for cell 'design_1_i/axi_gpio_1' Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp8/design_1_axi_gpio_1_0_in_context.xdc] for cell 'design_1_i/axi_gpio_1' Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp9/design_1_rst_ps7_0_100M_0_in_context.xdc] for cell 'design_1_i/rst_ps7_0_100M' Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp9/design_1_rst_ps7_0_100M_0_in_context.xdc] for cell 'design_1_i/rst_ps7_0_100M' Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp10/design_1_xbar_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/xbar' Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp10/design_1_xbar_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/xbar' Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp11/design_1_auto_pc_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/s00_couplers/auto_pc' Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp11/design_1_auto_pc_0_in_context.xdc] for cell 'design_1_i/ps7_0_axi_periph/s00_couplers/auto_pc' Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/dont_touch.xdc] Finished Parsing XDC File [/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/dont_touch.xdc] Completed Processing XDC Constraints INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. Constraint Validation Runtime : Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 1652.938 ; gain = 0.000 ; free physical = 1851 ; free virtual = 25111 --------------------------------------------------------------------------------- Finished Constraint Validation : Time (s): cpu = 00:00:27 ; elapsed = 00:01:10 . Memory (MB): peak = 1652.938 ; gain = 425.641 ; free physical = 1938 ; free virtual = 25199 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Loading Part and Timing Information --------------------------------------------------------------------------------- Loading part: xc7z020clg484-1 --------------------------------------------------------------------------------- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:27 ; elapsed = 00:01:10 . Memory (MB): peak = 1652.938 ; gain = 425.641 ; free physical = 1938 ; free virtual = 25199 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying 'set_property' XDC Constraints --------------------------------------------------------------------------------- Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 2). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 3). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[10]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 4). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[10]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 5). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[11]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 6). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[11]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 7). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[12]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 8). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[12]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 9). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[13]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 10). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[13]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 11). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[14]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 12). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[14]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 13). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 14). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 15). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 16). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 17). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 18). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 19). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[4]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 20). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[4]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 21). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[5]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 22). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[5]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 23). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[6]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 24). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[6]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 25). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[7]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 26). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[7]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 27). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[8]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 28). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[8]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 29). Applied set_property IO_BUFFER_TYPE = NONE for DDR_addr[9]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 30). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_addr[9]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 31). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ba[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 32). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ba[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 33). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ba[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 34). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ba[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 35). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ba[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 36). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ba[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 37). Applied set_property IO_BUFFER_TYPE = NONE for DDR_cas_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 38). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_cas_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 39). Applied set_property IO_BUFFER_TYPE = NONE for DDR_cke. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 40). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_cke. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 41). Applied set_property IO_BUFFER_TYPE = NONE for DDR_cs_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 42). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_cs_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 43). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ck_p. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 44). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ck_p. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 45). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ck_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 46). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ck_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 47). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 48). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 49). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 50). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 51). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 52). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 53). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dm[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 54). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dm[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 55). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 56). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 57). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 58). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 59). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 60). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 61). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_p[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 62). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_p[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 63). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 64). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 65). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 66). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 67). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 68). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 69). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dqs_n[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 70). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dqs_n[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 71). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 72). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 73). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[10]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 74). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[10]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 75). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[11]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 76). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[11]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 77). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[12]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 78). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[12]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 79). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[13]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 80). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[13]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 81). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[14]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 82). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[14]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 83). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[15]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 84). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[15]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 85). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[16]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 86). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[16]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 87). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[17]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 88). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[17]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 89). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[18]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 90). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[18]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 91). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[19]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 92). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[19]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 93). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 94). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 95). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[20]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 96). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[20]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 97). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[21]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 98). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[21]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 99). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[22]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 100). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[22]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 101). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[23]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 102). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[23]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 103). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[24]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 104). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[24]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 105). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[25]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 106). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[25]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 107). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[26]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 108). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[26]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 109). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[27]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 110). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[27]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 111). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[28]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 112). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[28]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 113). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[29]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 114). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[29]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 115). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 116). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 117). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[30]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 118). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[30]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 119). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[31]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 120). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[31]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 121). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 122). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 123). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[4]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 124). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[4]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 125). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[5]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 126). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[5]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 127). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[6]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 128). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[6]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 129). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[7]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 130). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[7]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 131). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[8]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 132). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[8]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 133). Applied set_property IO_BUFFER_TYPE = NONE for DDR_dq[9]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 134). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_dq[9]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 135). Applied set_property IO_BUFFER_TYPE = NONE for DDR_reset_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 136). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_reset_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 137). Applied set_property IO_BUFFER_TYPE = NONE for DDR_odt. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 138). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_odt. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 139). Applied set_property IO_BUFFER_TYPE = NONE for DDR_ras_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 140). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_ras_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 141). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrn. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 142). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrn. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 143). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrp. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 144). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ddr_vrp. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 145). Applied set_property IO_BUFFER_TYPE = NONE for DDR_we_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 146). Applied set_property CLOCK_BUFFER_TYPE = NONE for DDR_we_n. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 147). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 148). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[0]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 149). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[10]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 150). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[10]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 151). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[11]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 152). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[11]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 153). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[12]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 154). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[12]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 155). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[13]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 156). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[13]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 157). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[14]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 158). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[14]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 159). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[15]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 160). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[15]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 161). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[16]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 162). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[16]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 163). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[17]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 164). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[17]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 165). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[18]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 166). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[18]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 167). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[19]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 168). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[19]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 169). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 170). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[1]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 171). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[20]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 172). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[20]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 173). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[21]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 174). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[21]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 175). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[22]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 176). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[22]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 177). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[23]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 178). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[23]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 179). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[24]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 180). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[24]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 181). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[25]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 182). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[25]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 183). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[26]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 184). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[26]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 185). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[27]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 186). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[27]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 187). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[28]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 188). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[28]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 189). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[29]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 190). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[29]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 191). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 192). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[2]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 193). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[30]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 194). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[30]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 195). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[31]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 196). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[31]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 197). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[32]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 198). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[32]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 199). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[33]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 200). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[33]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 201). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[34]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 202). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[34]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 203). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[35]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 204). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[35]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 205). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[36]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 206). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[36]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 207). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[37]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 208). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[37]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 209). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[38]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 210). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[38]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 211). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[39]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 212). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[39]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 213). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 214). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[3]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 215). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[40]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 216). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[40]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 217). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[41]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 218). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[41]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 219). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[42]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 220). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[42]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 221). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[43]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 222). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[43]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 223). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[44]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 224). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[44]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 225). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[45]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 226). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[45]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 227). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[46]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 228). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[46]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 229). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[47]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 230). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[47]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 231). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[48]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 232). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[48]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 233). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[49]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 234). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[49]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 235). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[4]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 236). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[4]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 237). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[50]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 238). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[50]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 239). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[51]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 240). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[51]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 241). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[52]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 242). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[52]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 243). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[53]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 244). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[53]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 245). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[5]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 246). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[5]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 247). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[6]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 248). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[6]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 249). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[7]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 250). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[7]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 251). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[8]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 252). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[8]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 253). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_mio[9]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 254). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_mio[9]. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 255). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ps_clk. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 256). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ps_clk. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 257). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ps_porb. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 258). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ps_porb. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 259). Applied set_property IO_BUFFER_TYPE = NONE for FIXED_IO_ps_srstb. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 260). Applied set_property CLOCK_BUFFER_TYPE = NONE for FIXED_IO_ps_srstb. (constraint file /home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/.Xil/Vivado-18547-viper/dcp6/design_1_processing_system7_0_0_in_context.xdc, line 261). Applied set_property DONT_TOUCH = true for design_1_i. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/axi_gpio_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/axi_gpio_1. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/processing_system7_0. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/ps7_0_axi_periph. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/ps7_0_axi_periph/s00_couplers/auto_pc. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/ps7_0_axi_periph/xbar. (constraint file auto generated constraint, line ). Applied set_property DONT_TOUCH = true for design_1_i/rst_ps7_0_100M. (constraint file auto generated constraint, line ). --------------------------------------------------------------------------------- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:28 ; elapsed = 00:01:10 . Memory (MB): peak = 1652.938 ; gain = 425.641 ; free physical = 1940 ; free virtual = 25200 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:28 ; elapsed = 00:01:10 . Memory (MB): peak = 1652.938 ; gain = 425.641 ; free physical = 1940 ; free virtual = 25201 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start RTL Component Statistics --------------------------------------------------------------------------------- Detailed RTL Component Info : --------------------------------------------------------------------------------- Finished RTL Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start RTL Hierarchical Component Statistics --------------------------------------------------------------------------------- Hierarchical RTL Component report --------------------------------------------------------------------------------- Finished RTL Hierarchical Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Part Resource Summary --------------------------------------------------------------------------------- Part Resources: DSPs: 220 (col length:60) BRAMs: 280 (col length: RAMB18 60 RAMB36 30) --------------------------------------------------------------------------------- Finished Part Resource Summary --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Cross Boundary and Area Optimization --------------------------------------------------------------------------------- WARNING: [Synth 8-3331] design design_1_ps7_0_axi_periph_0 has unconnected port M00_ACLK WARNING: [Synth 8-3331] design design_1_ps7_0_axi_periph_0 has unconnected port M00_ARESETN WARNING: [Synth 8-3331] design design_1_ps7_0_axi_periph_0 has unconnected port M01_ACLK WARNING: [Synth 8-3331] design design_1_ps7_0_axi_periph_0 has unconnected port M01_ARESETN --------------------------------------------------------------------------------- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:28 ; elapsed = 00:01:10 . Memory (MB): peak = 1652.938 ; gain = 425.641 ; free physical = 1940 ; free virtual = 25200 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start Applying XDC Timing Constraints --------------------------------------------------------------------------------- INFO: [Synth 8-5578] Moved timing constraint from pin 'design_1_i/processing_system7_0/FCLK_CLK0' to pin 'design_1_i/processing_system7_0/bbstub_FCLK_CLK0/O' INFO: [Synth 8-5819] Moved 1 constraints on hierarchical pins to their respective driving/loading pins --------------------------------------------------------------------------------- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:35 ; elapsed = 00:01:21 . Memory (MB): peak = 1662.938 ; gain = 435.641 ; free physical = 1812 ; free virtual = 25072 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Timing Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Timing Optimization : Time (s): cpu = 00:00:35 ; elapsed = 00:01:21 . Memory (MB): peak = 1662.938 ; gain = 435.641 ; free physical = 1812 ; free virtual = 25072 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start Technology Mapping --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Technology Mapping : Time (s): cpu = 00:00:35 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.949 ; gain = 445.652 ; free physical = 1811 ; free virtual = 25071 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished IO Insertion : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25072 --------------------------------------------------------------------------------- Report Check Netlist: +------+------------------+-------+---------+-------+------------------+ | |Item |Errors |Warnings |Status |Description | +------+------------------+-------+---------+-------+------------------+ |1 |multi_driven_nets | 0| 0|Passed |Multi driven nets | +------+------------------+-------+---------+-------+------------------+ --------------------------------------------------------------------------------- Start Renaming Generated Instances --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Instances : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25072 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start Rebuilding User Hierarchy --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25072 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Ports --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Ports : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25071 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25071 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Nets --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Nets : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25071 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Writing Synthesis Report --------------------------------------------------------------------------------- Report BlackBoxes: +------+--------------------------------+----------+ | |BlackBox name |Instances | +------+--------------------------------+----------+ |1 |design_1_xbar_0 | 1| |2 |design_1_auto_pc_0 | 1| |3 |design_1_axi_gpio_0_0 | 1| |4 |design_1_axi_gpio_1_0 | 1| |5 |design_1_processing_system7_0_0 | 1| |6 |design_1_rst_ps7_0_100M_0 | 1| +------+--------------------------------+----------+ Report Cell Usage: +------+---------------------------------------+------+ | |Cell |Count | +------+---------------------------------------+------+ |1 |design_1_auto_pc_0_bbox_3 | 1| |2 |design_1_axi_gpio_0_0_bbox_0 | 1| |3 |design_1_axi_gpio_1_0_bbox_1 | 1| |4 |design_1_processing_system7_0_0_bbox_2 | 1| |5 |design_1_rst_ps7_0_100M_0_bbox_5 | 1| |6 |design_1_xbar_0_bbox_4 | 1| |7 |IBUF | 13| |8 |OBUF | 8| +------+---------------------------------------+------+ Report Instance Areas: +------+---------------------+----------------------------+------+ | |Instance |Module |Cells | +------+---------------------+----------------------------+------+ |1 |top | | 751| |2 | design_1_i |design_1 | 730| |3 | ps7_0_axi_periph |design_1_ps7_0_axi_periph_0 | 440| |4 | s00_couplers |s00_couplers_imp_UYSKKA | 177| +------+---------------------+----------------------------+------+ --------------------------------------------------------------------------------- Finished Writing Synthesis Report : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.953 ; gain = 445.656 ; free physical = 1811 ; free virtual = 25071 --------------------------------------------------------------------------------- Synthesis finished with 0 errors, 0 critical warnings and 4 warnings. Synthesis Optimization Runtime : Time (s): cpu = 00:00:26 ; elapsed = 00:00:31 . Memory (MB): peak = 1672.953 ; gain = 151.543 ; free physical = 1869 ; free virtual = 25129 Synthesis Optimization Complete : Time (s): cpu = 00:00:36 ; elapsed = 00:01:21 . Memory (MB): peak = 1672.957 ; gain = 445.656 ; free physical = 1869 ; free virtual = 25129 INFO: [Project 1-571] Translating synthesized netlist INFO: [Netlist 29-17] Analyzing 13 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s). INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. INFO: [Common 17-83] Releasing license: Synthesis 41 Infos, 15 Warnings, 0 Critical Warnings and 0 Errors encountered. synth_design completed successfully synth_design: Time (s): cpu = 00:00:39 ; elapsed = 00:01:24 . Memory (MB): peak = 1677.949 ; gain = 469.758 ; free physical = 1851 ; free virtual = 25111 INFO: [Common 17-1381] The checkpoint '/home/nagyz/eda/2017.4/test_gpio_zedboard/test_gpio_zedboard.runs/synth_1/design_1_wrapper.dcp' has been generated. INFO: [runtcl-4] Executing : report_utilization -file design_1_wrapper_utilization_synth.rpt -pb design_1_wrapper_utilization_synth.pb report_utilization: Time (s): cpu = 00:00:00.10 ; elapsed = 00:00:00.14 . Memory (MB): peak = 1677.957 ; gain = 0.000 ; free physical = 1852 ; free virtual = 25112 INFO: [Common 17-206] Exiting Vivado at Fri Feb 16 17:08:48 2018...