Folder Path
/
MSc
/
HLS-FPGA
/
test_gpio_zedboard
/
test_gpio_zedboard.cache
/
ip
/
2017.4
/
e06ab070ceeb3f66
/
0
directories
6
files
722 KiB
total
List
Grid
Name
Size
Modified
Up
design_1_processing_system7_0_0.dcp
211 KiB
05/17/2022 08:14:32 PM +00:00
design_1_processing_system7_0_0_sim_netlist.v
177 KiB
05/17/2022 08:14:32 PM +00:00
design_1_processing_system7_0_0_sim_netlist.vhdl
202 KiB
05/17/2022 08:14:32 PM +00:00
design_1_processing_system7_0_0_stub.v
5.1 KiB
05/17/2022 08:14:32 PM +00:00
design_1_processing_system7_0_0_stub.vhdl
5.6 KiB
05/17/2022 08:14:32 PM +00:00
e06ab070ceeb3f66.xci
121 KiB
05/17/2022 08:14:32 PM +00:00