; ModuleID = '/home/hakta/Documents/matrix_mult/solution3/.autopilot/db/a.o.3.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mode5 = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@mode3 = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@mode = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@memcpy_OC_tempB_OC_B = internal unnamed_addr constant [15 x i8] c"memcpy.tempB.B\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_tempA_OC_A = internal unnamed_addr constant [15 x i8] c"memcpy.tempA.A\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_result_OC_s = internal unnamed_addr constant [29 x i8] c"memcpy.result.tempResult.gep\00" ; [#uses=1 type=[29 x i8]*]
@matrix_mult_str = internal unnamed_addr constant [12 x i8] c"matrix_mult\00" ; [#uses=1 type=[12 x i8]*]
@burstwrite_OC_region = internal unnamed_addr constant [18 x i8] c"burstwrite.region\00" ; [#uses=2 type=[18 x i8]*]
@burstread_OC_region_s = internal unnamed_addr constant [17 x i8] c"burstread.region\00" ; [#uses=4 type=[17 x i8]*]
@bundle6 = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@bundle4 = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@bundle = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str9 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str8 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str5 = private unnamed_addr constant [24 x i8] c"matrix_mult__outer_loop\00", align 1 ; [#uses=3 type=[24 x i8]*]
@p_str3 = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1 ; [#uses=1 type=[10 x i8]*]
@p_str2 = private unnamed_addr constant [6 x i8] c"slave\00", align 1 ; [#uses=4 type=[6 x i8]*]
@p_str10 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 ; [#uses=24 type=[1 x i8]*]
@p_str = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1 ; [#uses=1 type=[6 x i8]*]

; [#uses=0]
define void @matrix_mult(i32* %gmem, i32 %A, i32 %B, i32 %result) {
  %result_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %result) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %result_read}, i64 0, metadata !11), !dbg !23 ; [debug line = 4:46] [debug variable = result]
  %B_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %B) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %B_read}, i64 0, metadata !24), !dbg !25 ; [debug line = 4:34] [debug variable = B]
  %A_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %A) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %A_read}, i64 0, metadata !26), !dbg !27 ; [debug line = 4:22] [debug variable = A]
  %result5 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %result_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_5 = zext i30 %result5 to i64               ; [#uses=1 type=i64]
  %gmem_addr = getelementptr i32* %gmem, i64 %tmp_5 ; [#uses=3 type=i32*]
  %B3 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %B_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_6 = zext i30 %B3 to i64                    ; [#uses=1 type=i64]
  %gmem_addr_1 = getelementptr i32* %gmem, i64 %tmp_6 ; [#uses=2 type=i32*]
  %A1 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %A_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_7 = zext i30 %A1 to i64                    ; [#uses=1 type=i64]
  %gmem_addr_2 = getelementptr i32* %gmem, i64 %tmp_7 ; [#uses=2 type=i32*]
  call void (...)* @_ssdm_op_SpecBitsMap(i32* %gmem), !map !28
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @matrix_mult_str) nounwind
  %tempA_0 = alloca [32 x i32], align 4           ; [#uses=9 type=[32 x i32]*]
  %tempA_1 = alloca [32 x i32], align 4           ; [#uses=9 type=[32 x i32]*]
  %tempB_0 = alloca [32 x i32], align 4           ; [#uses=33 type=[32 x i32]*]
  %tempB_1 = alloca [32 x i32], align 4           ; [#uses=33 type=[32 x i32]*]
  %tempResult_0 = alloca [32 x i32], align 4      ; [#uses=9 type=[32 x i32]*]
  %tempResult_1 = alloca [32 x i32], align 4      ; [#uses=9 type=[32 x i32]*]
  call void @llvm.dbg.value(metadata !{i32 %A}, i64 0, metadata !26), !dbg !27 ; [debug line = 4:22] [debug variable = A]
  call void @llvm.dbg.value(metadata !{i32 %B}, i64 0, metadata !24), !dbg !25 ; [debug line = 4:34] [debug variable = B]
  call void @llvm.dbg.value(metadata !{i32 %result}, i64 0, metadata !11), !dbg !23 ; [debug line = 4:46] [debug variable = result]
  call void (...)* @_ssdm_op_SpecInterface(i32 %result, [10 x i8]* @mode5, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle6, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %B, [10 x i8]* @mode3, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle4, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32* %gmem, [6 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @p_str1, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %A, [10 x i8]* @mode, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @p_str3, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind, !dbg !36 ; [debug line = 5:1]
  call void @llvm.dbg.declare(metadata !{[32 x i32]* %tempA_0}, metadata !38), !dbg !41 ; [debug line = 5:6] [debug variable = tempA[0]]
  call void @llvm.dbg.declare(metadata !{[32 x i32]* %tempA_1}, metadata !42), !dbg !41 ; [debug line = 5:6] [debug variable = tempA[1]]
  call void @llvm.dbg.declare(metadata !{[32 x i32]* %tempB_0}, metadata !43), !dbg !45 ; [debug line = 5:18] [debug variable = tempB[0]]
  call void @llvm.dbg.declare(metadata !{[32 x i32]* %tempB_1}, metadata !46), !dbg !45 ; [debug line = 5:18] [debug variable = tempB[1]]
  call void @llvm.dbg.declare(metadata !{[32 x i32]* %tempResult_0}, metadata !47), !dbg !49 ; [debug line = 5:30] [debug variable = tempResult[0]]
  call void @llvm.dbg.declare(metadata !{[32 x i32]* %tempResult_1}, metadata !50), !dbg !49 ; [debug line = 5:30] [debug variable = tempResult[1]]
  %gmem_addr_2_rd_req = call i1 @_ssdm_op_ReadReq.m_axi.i32P(i32* %gmem_addr_2, i32 64), !dbg !51 ; [#uses=0 type=i1] [debug line = 6:2]
  br label %burst.rd.header

burst.rd.header:                                  ; preds = %burst.rd.body506, %0
  %indvar = phi i7 [ 0, %0 ], [ %indvar_next, %burst.rd.body506 ] ; [#uses=4 type=i7]
  %exitcond3 = icmp eq i7 %indvar, -64            ; [#uses=1 type=i1]
  %indvar_next = add i7 %indvar, 1                ; [#uses=1 type=i7]
  br i1 %exitcond3, label %burst.rd.header7.preheader, label %burst.rd.body

burst.rd.header7.preheader:                       ; preds = %burst.rd.header
  %gmem_addr_1_rd_req = call i1 @_ssdm_op_ReadReq.m_axi.i32P(i32* %gmem_addr_1, i32 64), !dbg !52 ; [#uses=0 type=i1] [debug line = 7:2]
  br label %burst.rd.header7

burst.rd.body:                                    ; preds = %burst.rd.header
  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstread_rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region_s) nounwind ; [#uses=1 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str8)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempA_OC_A)
  %gmem_addr_2_read = call i32 @_ssdm_op_Read.m_axi.i32P(i32* %gmem_addr_2), !dbg !51 ; [#uses=2 type=i32] [debug line = 6:2]
  %tmp = trunc i7 %indvar to i1                   ; [#uses=1 type=i1]
  %newIndex = call i6 @_ssdm_op_PartSelect.i6.i7.i32.i32(i7 %indvar, i32 1, i32 6) ; [#uses=1 type=i6]
  %newIndex1 = zext i6 %newIndex to i64           ; [#uses=2 type=i64]
  %tempA_0_addr = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex1, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2]
  %tempA_1_addr = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex1, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2]
  br i1 %tmp, label %branch5, label %branch4, !dbg !51 ; [debug line = 6:2]

burst.rd.body506:                                 ; preds = %branch5, %branch4
  %burstread_rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region_s, i32 %burstread_rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header

burst.rd.header7:                                 ; preds = %burst.rd.body8420, %burst.rd.header7.preheader
  %indvar9 = phi i7 [ %indvar_next1, %burst.rd.body8420 ], [ 0, %burst.rd.header7.preheader ] ; [#uses=4 type=i7]
  %exitcond4 = icmp eq i7 %indvar9, -64           ; [#uses=1 type=i1]
  %indvar_next1 = add i7 %indvar9, 1              ; [#uses=1 type=i7]
  br i1 %exitcond4, label %burst.rd.end6.0.preheader, label %burst.rd.body8

burst.rd.end6.0.preheader:                        ; preds = %burst.rd.header7
  %tempB_0_addr_1 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 0 ; [#uses=1 type=i32*]
  %tempB_0_load = load i32* %tempB_0_addr_1, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_2 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 4 ; [#uses=1 type=i32*]
  %tempB_0_load_1 = load i32* %tempB_0_addr_2, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_3 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 8 ; [#uses=1 type=i32*]
  %tempB_0_load_2 = load i32* %tempB_0_addr_3, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_4 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 12 ; [#uses=1 type=i32*]
  %tempB_0_load_3 = load i32* %tempB_0_addr_4, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_5 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 16 ; [#uses=1 type=i32*]
  %tempB_0_load_4 = load i32* %tempB_0_addr_5, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_6 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 20 ; [#uses=1 type=i32*]
  %tempB_0_load_5 = load i32* %tempB_0_addr_6, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_7 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 24 ; [#uses=1 type=i32*]
  %tempB_0_load_6 = load i32* %tempB_0_addr_7, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_8 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 28 ; [#uses=1 type=i32*]
  %tempB_0_load_7 = load i32* %tempB_0_addr_8, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_1 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 0 ; [#uses=1 type=i32*]
  %tempB_1_load = load i32* %tempB_1_addr_1, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_2 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 4 ; [#uses=1 type=i32*]
  %tempB_1_load_1 = load i32* %tempB_1_addr_2, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_3 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 8 ; [#uses=1 type=i32*]
  %tempB_1_load_2 = load i32* %tempB_1_addr_3, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_4 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 12 ; [#uses=1 type=i32*]
  %tempB_1_load_3 = load i32* %tempB_1_addr_4, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_5 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 16 ; [#uses=1 type=i32*]
  %tempB_1_load_4 = load i32* %tempB_1_addr_5, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_6 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 20 ; [#uses=1 type=i32*]
  %tempB_1_load_5 = load i32* %tempB_1_addr_6, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_7 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 24 ; [#uses=1 type=i32*]
  %tempB_1_load_6 = load i32* %tempB_1_addr_7, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_8 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 28 ; [#uses=1 type=i32*]
  %tempB_1_load_7 = load i32* %tempB_1_addr_8, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_9 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 1 ; [#uses=1 type=i32*]
  %tempB_0_load_8 = load i32* %tempB_0_addr_9, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_10 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 5 ; [#uses=1 type=i32*]
  %tempB_0_load_9 = load i32* %tempB_0_addr_10, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_11 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 9 ; [#uses=1 type=i32*]
  %tempB_0_load_10 = load i32* %tempB_0_addr_11, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_12 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 13 ; [#uses=1 type=i32*]
  %tempB_0_load_11 = load i32* %tempB_0_addr_12, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_13 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 17 ; [#uses=1 type=i32*]
  %tempB_0_load_12 = load i32* %tempB_0_addr_13, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_14 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 21 ; [#uses=1 type=i32*]
  %tempB_0_load_13 = load i32* %tempB_0_addr_14, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_15 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 25 ; [#uses=1 type=i32*]
  %tempB_0_load_14 = load i32* %tempB_0_addr_15, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_16 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 29 ; [#uses=1 type=i32*]
  %tempB_0_load_15 = load i32* %tempB_0_addr_16, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_9 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 1 ; [#uses=1 type=i32*]
  %tempB_1_load_8 = load i32* %tempB_1_addr_9, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_10 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 5 ; [#uses=1 type=i32*]
  %tempB_1_load_9 = load i32* %tempB_1_addr_10, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_11 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 9 ; [#uses=1 type=i32*]
  %tempB_1_load_10 = load i32* %tempB_1_addr_11, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_12 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 13 ; [#uses=1 type=i32*]
  %tempB_1_load_11 = load i32* %tempB_1_addr_12, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_13 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 17 ; [#uses=1 type=i32*]
  %tempB_1_load_12 = load i32* %tempB_1_addr_13, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_14 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 21 ; [#uses=1 type=i32*]
  %tempB_1_load_13 = load i32* %tempB_1_addr_14, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_15 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 25 ; [#uses=1 type=i32*]
  %tempB_1_load_14 = load i32* %tempB_1_addr_15, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_16 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 29 ; [#uses=1 type=i32*]
  %tempB_1_load_15 = load i32* %tempB_1_addr_16, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_17 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 2 ; [#uses=1 type=i32*]
  %tempB_0_load_16 = load i32* %tempB_0_addr_17, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_18 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 6 ; [#uses=1 type=i32*]
  %tempB_0_load_17 = load i32* %tempB_0_addr_18, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_19 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 10 ; [#uses=1 type=i32*]
  %tempB_0_load_18 = load i32* %tempB_0_addr_19, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_20 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 14 ; [#uses=1 type=i32*]
  %tempB_0_load_19 = load i32* %tempB_0_addr_20, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_21 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 18 ; [#uses=1 type=i32*]
  %tempB_0_load_20 = load i32* %tempB_0_addr_21, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_22 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 22 ; [#uses=1 type=i32*]
  %tempB_0_load_21 = load i32* %tempB_0_addr_22, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_23 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 26 ; [#uses=1 type=i32*]
  %tempB_0_load_22 = load i32* %tempB_0_addr_23, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_24 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 30 ; [#uses=1 type=i32*]
  %tempB_0_load_23 = load i32* %tempB_0_addr_24, align 16, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_17 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 2 ; [#uses=1 type=i32*]
  %tempB_1_load_16 = load i32* %tempB_1_addr_17, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_18 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 6 ; [#uses=1 type=i32*]
  %tempB_1_load_17 = load i32* %tempB_1_addr_18, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_19 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 10 ; [#uses=1 type=i32*]
  %tempB_1_load_18 = load i32* %tempB_1_addr_19, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_20 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 14 ; [#uses=1 type=i32*]
  %tempB_1_load_19 = load i32* %tempB_1_addr_20, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_21 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 18 ; [#uses=1 type=i32*]
  %tempB_1_load_20 = load i32* %tempB_1_addr_21, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_22 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 22 ; [#uses=1 type=i32*]
  %tempB_1_load_21 = load i32* %tempB_1_addr_22, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_23 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 26 ; [#uses=1 type=i32*]
  %tempB_1_load_22 = load i32* %tempB_1_addr_23, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_24 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 30 ; [#uses=1 type=i32*]
  %tempB_1_load_23 = load i32* %tempB_1_addr_24, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_25 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 3 ; [#uses=1 type=i32*]
  %tempB_0_load_24 = load i32* %tempB_0_addr_25, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_26 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 7 ; [#uses=1 type=i32*]
  %tempB_0_load_25 = load i32* %tempB_0_addr_26, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_27 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 11 ; [#uses=1 type=i32*]
  %tempB_0_load_26 = load i32* %tempB_0_addr_27, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_28 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 15 ; [#uses=1 type=i32*]
  %tempB_0_load_27 = load i32* %tempB_0_addr_28, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_29 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 19 ; [#uses=1 type=i32*]
  %tempB_0_load_28 = load i32* %tempB_0_addr_29, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_30 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 23 ; [#uses=1 type=i32*]
  %tempB_0_load_29 = load i32* %tempB_0_addr_30, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_31 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 27 ; [#uses=1 type=i32*]
  %tempB_0_load_30 = load i32* %tempB_0_addr_31, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_0_addr_32 = getelementptr [32 x i32]* %tempB_0, i64 0, i64 31 ; [#uses=1 type=i32*]
  %tempB_0_load_31 = load i32* %tempB_0_addr_32, align 8, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_25 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 3 ; [#uses=1 type=i32*]
  %tempB_1_load_24 = load i32* %tempB_1_addr_25, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_26 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 7 ; [#uses=1 type=i32*]
  %tempB_1_load_25 = load i32* %tempB_1_addr_26, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_27 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 11 ; [#uses=1 type=i32*]
  %tempB_1_load_26 = load i32* %tempB_1_addr_27, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_28 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 15 ; [#uses=1 type=i32*]
  %tempB_1_load_27 = load i32* %tempB_1_addr_28, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_29 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 19 ; [#uses=1 type=i32*]
  %tempB_1_load_28 = load i32* %tempB_1_addr_29, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_30 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 23 ; [#uses=1 type=i32*]
  %tempB_1_load_29 = load i32* %tempB_1_addr_30, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_31 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 27 ; [#uses=1 type=i32*]
  %tempB_1_load_30 = load i32* %tempB_1_addr_31, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  %tempB_1_addr_32 = getelementptr [32 x i32]* %tempB_1, i64 0, i64 31 ; [#uses=1 type=i32*]
  %tempB_1_load_31 = load i32* %tempB_1_addr_32, align 4, !dbg !53 ; [#uses=2 type=i32] [debug line = 16:5]
  br label %burst.rd.end6.0

burst.rd.body8:                                   ; preds = %burst.rd.header7
  %empty_7 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstread_rbegin1 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region_s) nounwind ; [#uses=1 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str9)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempB_OC_B)
  %gmem_addr_1_read = call i32 @_ssdm_op_Read.m_axi.i32P(i32* %gmem_addr_1), !dbg !52 ; [#uses=2 type=i32] [debug line = 7:2]
  %tmp_1 = trunc i7 %indvar9 to i1                ; [#uses=1 type=i1]
  %newIndex2 = call i6 @_ssdm_op_PartSelect.i6.i7.i32.i32(i7 %indvar9, i32 1, i32 6) ; [#uses=1 type=i6]
  %newIndex3 = zext i6 %newIndex2 to i64          ; [#uses=2 type=i64]
  %tempB_0_addr = getelementptr [32 x i32]* %tempB_0, i64 0, i64 %newIndex3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 7:2]
  %tempB_1_addr = getelementptr [32 x i32]* %tempB_1, i64 0, i64 %newIndex3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 7:2]
  br i1 %tmp_1, label %branch3, label %branch2, !dbg !52 ; [debug line = 7:2]

burst.rd.body8420:                                ; preds = %branch3, %branch2
  %burstread_rend14 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region_s, i32 %burstread_rbegin1) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header7

burst.rd.end6.0:                                  ; preds = %burst.rd.end6.1, %burst.rd.end6.0.preheader
  %i = phi i4 [ %i_1_1, %burst.rd.end6.1 ], [ 0, %burst.rd.end6.0.preheader ] ; [#uses=3 type=i4]
  %exitcond2 = icmp eq i4 %i, -8, !dbg !60        ; [#uses=1 type=i1] [debug line = 10:16]
  br i1 %exitcond2, label %burst.wr.header.preheader, label %burst.rd.end6.1, !dbg !60 ; [debug line = 10:16]

burst.wr.header.preheader:                        ; preds = %burst.rd.end6.0
  %gmem_addr_wr_req = call i1 @_ssdm_op_WriteReq.m_axi.i32P(i32* %gmem_addr, i32 64), !dbg !61 ; [#uses=0 type=i1] [debug line = 18:2]
  br label %burst.wr.header

burst.rd.end6.1:                                  ; preds = %burst.rd.end6.0
  %empty_8 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 4, i64 4, i64 4) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecLoopName([24 x i8]* @p_str5) nounwind, !dbg !62 ; [debug line = 12:2]
  %tmp_2 = call i32 (...)* @_ssdm_op_SpecRegionBegin([24 x i8]* @p_str5) nounwind, !dbg !62 ; [#uses=1 type=i32] [debug line = 12:2]
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind, !dbg !63 ; [debug line = 12:1]
  %tmp_3 = trunc i4 %i to i3                      ; [#uses=1 type=i3]
  %tmp_4 = call i5 @_ssdm_op_BitConcatenate.i5.i3.i2(i3 %tmp_3, i2 0) ; [#uses=8 type=i5]
  %newIndex5 = zext i5 %tmp_4 to i64              ; [#uses=4 type=i64]
  %tempResult_0_addr = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex5 ; [#uses=1 type=i32*]
  %tempA_0_addr_1 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex5 ; [#uses=1 type=i32*]
  %tempA_0_load = load i32* %tempA_0_addr_1, align 16, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_s = mul nsw i32 %tempB_0_load, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_1 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex5 ; [#uses=1 type=i32*]
  %tempA_1_load = load i32* %tempA_1_addr_1, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_1 = mul nsw i32 %tempB_0_load_1, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %newIndex6 = or i5 %tmp_4, 1                    ; [#uses=1 type=i5]
  %newIndex7 = zext i5 %newIndex6 to i64          ; [#uses=4 type=i64]
  %tempA_0_addr_2 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex7 ; [#uses=1 type=i32*]
  %tempA_0_load_1 = load i32* %tempA_0_addr_2, align 8, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_2 = mul nsw i32 %tempB_0_load_2, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_2 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex7 ; [#uses=1 type=i32*]
  %tempA_1_load_1 = load i32* %tempA_1_addr_2, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_3 = mul nsw i32 %tempB_0_load_3, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %newIndex8 = or i5 %tmp_4, 2                    ; [#uses=1 type=i5]
  %newIndex9 = zext i5 %newIndex8 to i64          ; [#uses=4 type=i64]
  %tempA_0_addr_3 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex9 ; [#uses=1 type=i32*]
  %tempA_0_load_2 = load i32* %tempA_0_addr_3, align 16, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_4 = mul nsw i32 %tempB_0_load_4, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_3 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex9 ; [#uses=1 type=i32*]
  %tempA_1_load_2 = load i32* %tempA_1_addr_3, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_5 = mul nsw i32 %tempB_0_load_5, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %newIndex4 = or i5 %tmp_4, 3                    ; [#uses=1 type=i5]
  %newIndex10 = zext i5 %newIndex4 to i64         ; [#uses=4 type=i64]
  %tempA_0_addr_4 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex10 ; [#uses=1 type=i32*]
  %tempA_0_load_3 = load i32* %tempA_0_addr_4, align 8, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_6 = mul nsw i32 %tempB_0_load_6, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_4 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex10 ; [#uses=1 type=i32*]
  %tempA_1_load_3 = load i32* %tempA_1_addr_4, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_7 = mul nsw i32 %tempB_0_load_7, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp2 = add i32 %tmp_s, %tmp_10_0_0_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp3 = add i32 %tmp_10_0_0_3, %tmp_10_0_0_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp1 = add i32 %tmp2, %tmp3, !dbg !53          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp5 = add i32 %tmp_10_0_0_5, %tmp_10_0_0_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp6 = add i32 %tmp_10_0_0_7, %tmp_10_0_0_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp4 = add i32 %tmp5, %tmp6, !dbg !53          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_0_7 = add nsw i32 %tmp1, %tmp4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_0_7, i32* %tempResult_0_addr, align 16, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex5 ; [#uses=1 type=i32*]
  %tmp_10_0_1 = mul nsw i32 %tempB_1_load, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_1 = mul nsw i32 %tempB_1_load_1, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_2 = mul nsw i32 %tempB_1_load_2, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_3 = mul nsw i32 %tempB_1_load_3, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_4 = mul nsw i32 %tempB_1_load_4, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_5 = mul nsw i32 %tempB_1_load_5, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_6 = mul nsw i32 %tempB_1_load_6, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_7 = mul nsw i32 %tempB_1_load_7, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp8 = add i32 %tmp_10_0_1, %tmp_10_0_1_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp9 = add i32 %tmp_10_0_1_3, %tmp_10_0_1_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp7 = add i32 %tmp8, %tmp9, !dbg !53          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp11 = add i32 %tmp_10_0_1_5, %tmp_10_0_1_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp12 = add i32 %tmp_10_0_1_7, %tmp_10_0_1_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp10 = add i32 %tmp11, %tmp12, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_1_7 = add nsw i32 %tmp7, %tmp10, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_1_7, i32* %tempResult_1_addr, align 4, !dbg !53 ; [debug line = 16:5]
  %tempResult_0_addr_1 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex7 ; [#uses=1 type=i32*]
  %tmp_10_0_2 = mul nsw i32 %tempB_0_load_8, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_1 = mul nsw i32 %tempB_0_load_9, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_2 = mul nsw i32 %tempB_0_load_10, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_3 = mul nsw i32 %tempB_0_load_11, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_4 = mul nsw i32 %tempB_0_load_12, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_5 = mul nsw i32 %tempB_0_load_13, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_6 = mul nsw i32 %tempB_0_load_14, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_7 = mul nsw i32 %tempB_0_load_15, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp14 = add i32 %tmp_10_0_2, %tmp_10_0_2_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp15 = add i32 %tmp_10_0_2_3, %tmp_10_0_2_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp13 = add i32 %tmp14, %tmp15, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp17 = add i32 %tmp_10_0_2_5, %tmp_10_0_2_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp18 = add i32 %tmp_10_0_2_7, %tmp_10_0_2_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp16 = add i32 %tmp17, %tmp18, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_2_7 = add nsw i32 %tmp13, %tmp16, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_2_7, i32* %tempResult_0_addr_1, align 8, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_1 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex7 ; [#uses=1 type=i32*]
  %tmp_10_0_3 = mul nsw i32 %tempB_1_load_8, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_1 = mul nsw i32 %tempB_1_load_9, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_2 = mul nsw i32 %tempB_1_load_10, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_3 = mul nsw i32 %tempB_1_load_11, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_4 = mul nsw i32 %tempB_1_load_12, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_5 = mul nsw i32 %tempB_1_load_13, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_6 = mul nsw i32 %tempB_1_load_14, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_7 = mul nsw i32 %tempB_1_load_15, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp20 = add i32 %tmp_10_0_3, %tmp_10_0_3_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp21 = add i32 %tmp_10_0_3_3, %tmp_10_0_3_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp19 = add i32 %tmp20, %tmp21, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp23 = add i32 %tmp_10_0_3_5, %tmp_10_0_3_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp24 = add i32 %tmp_10_0_3_7, %tmp_10_0_3_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp22 = add i32 %tmp23, %tmp24, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_3_7 = add nsw i32 %tmp19, %tmp22, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_3_7, i32* %tempResult_1_addr_1, align 4, !dbg !53 ; [debug line = 16:5]
  %tempResult_0_addr_2 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex9 ; [#uses=1 type=i32*]
  %tmp_10_0_4 = mul nsw i32 %tempB_0_load_16, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_1 = mul nsw i32 %tempB_0_load_17, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_2 = mul nsw i32 %tempB_0_load_18, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_3 = mul nsw i32 %tempB_0_load_19, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_4 = mul nsw i32 %tempB_0_load_20, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_5 = mul nsw i32 %tempB_0_load_21, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_6 = mul nsw i32 %tempB_0_load_22, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_7 = mul nsw i32 %tempB_0_load_23, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp26 = add i32 %tmp_10_0_4, %tmp_10_0_4_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp27 = add i32 %tmp_10_0_4_3, %tmp_10_0_4_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp25 = add i32 %tmp26, %tmp27, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp29 = add i32 %tmp_10_0_4_5, %tmp_10_0_4_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp30 = add i32 %tmp_10_0_4_7, %tmp_10_0_4_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp28 = add i32 %tmp29, %tmp30, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_4_7 = add nsw i32 %tmp25, %tmp28, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_4_7, i32* %tempResult_0_addr_2, align 16, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_2 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex9 ; [#uses=1 type=i32*]
  %tmp_10_0_5 = mul nsw i32 %tempB_1_load_16, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_1 = mul nsw i32 %tempB_1_load_17, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_2 = mul nsw i32 %tempB_1_load_18, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_3 = mul nsw i32 %tempB_1_load_19, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_4 = mul nsw i32 %tempB_1_load_20, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_5 = mul nsw i32 %tempB_1_load_21, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_6 = mul nsw i32 %tempB_1_load_22, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_7 = mul nsw i32 %tempB_1_load_23, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp32 = add i32 %tmp_10_0_5, %tmp_10_0_5_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp33 = add i32 %tmp_10_0_5_3, %tmp_10_0_5_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp31 = add i32 %tmp32, %tmp33, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp35 = add i32 %tmp_10_0_5_5, %tmp_10_0_5_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp36 = add i32 %tmp_10_0_5_7, %tmp_10_0_5_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp34 = add i32 %tmp35, %tmp36, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_5_7 = add nsw i32 %tmp31, %tmp34, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_5_7, i32* %tempResult_1_addr_2, align 4, !dbg !53 ; [debug line = 16:5]
  %tempResult_0_addr_3 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex10 ; [#uses=1 type=i32*]
  %tmp_10_0_6 = mul nsw i32 %tempB_0_load_24, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_1 = mul nsw i32 %tempB_0_load_25, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_2 = mul nsw i32 %tempB_0_load_26, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_3 = mul nsw i32 %tempB_0_load_27, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_4 = mul nsw i32 %tempB_0_load_28, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_5 = mul nsw i32 %tempB_0_load_29, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_6 = mul nsw i32 %tempB_0_load_30, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_7 = mul nsw i32 %tempB_0_load_31, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp38 = add i32 %tmp_10_0_6, %tmp_10_0_6_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp39 = add i32 %tmp_10_0_6_3, %tmp_10_0_6_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp37 = add i32 %tmp38, %tmp39, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp41 = add i32 %tmp_10_0_6_5, %tmp_10_0_6_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp42 = add i32 %tmp_10_0_6_7, %tmp_10_0_6_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp40 = add i32 %tmp41, %tmp42, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_6_7 = add nsw i32 %tmp37, %tmp40, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_6_7, i32* %tempResult_0_addr_3, align 8, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_3 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex10 ; [#uses=1 type=i32*]
  %tmp_10_0_7 = mul nsw i32 %tempB_1_load_24, %tempA_0_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_1 = mul nsw i32 %tempB_1_load_25, %tempA_1_load, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_2 = mul nsw i32 %tempB_1_load_26, %tempA_0_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_3 = mul nsw i32 %tempB_1_load_27, %tempA_1_load_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_4 = mul nsw i32 %tempB_1_load_28, %tempA_0_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_5 = mul nsw i32 %tempB_1_load_29, %tempA_1_load_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_6 = mul nsw i32 %tempB_1_load_30, %tempA_0_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_7 = mul nsw i32 %tempB_1_load_31, %tempA_1_load_3, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp44 = add i32 %tmp_10_0_7, %tmp_10_0_7_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp45 = add i32 %tmp_10_0_7_3, %tmp_10_0_7_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp43 = add i32 %tmp44, %tmp45, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp47 = add i32 %tmp_10_0_7_5, %tmp_10_0_7_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp48 = add i32 %tmp_10_0_7_7, %tmp_10_0_7_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp46 = add i32 %tmp47, %tmp48, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_7_7 = add nsw i32 %tmp43, %tmp46, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_7_7, i32* %tempResult_1_addr_3, align 4, !dbg !53 ; [debug line = 16:5]
  %empty_9 = call i32 (...)* @_ssdm_op_SpecRegionEnd([24 x i8]* @p_str5, i32 %tmp_2) nounwind, !dbg !64 ; [#uses=0 type=i32] [debug line = 16:61]
  %newIndex11 = or i5 %tmp_4, 4                   ; [#uses=1 type=i5]
  %newIndex12 = zext i5 %newIndex11 to i64        ; [#uses=4 type=i64]
  %tempResult_0_addr_4 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex12 ; [#uses=1 type=i32*]
  %tempA_0_addr_5 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex12 ; [#uses=1 type=i32*]
  %tempA_0_load_4 = load i32* %tempA_0_addr_5, align 16, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1 = mul nsw i32 %tempB_0_load, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_5 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex12 ; [#uses=1 type=i32*]
  %tempA_1_load_4 = load i32* %tempA_1_addr_5, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_1 = mul nsw i32 %tempB_0_load_1, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %newIndex13 = or i5 %tmp_4, 5                   ; [#uses=1 type=i5]
  %newIndex14 = zext i5 %newIndex13 to i64        ; [#uses=4 type=i64]
  %tempA_0_addr_6 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex14 ; [#uses=1 type=i32*]
  %tempA_0_load_5 = load i32* %tempA_0_addr_6, align 8, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_2 = mul nsw i32 %tempB_0_load_2, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_6 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex14 ; [#uses=1 type=i32*]
  %tempA_1_load_5 = load i32* %tempA_1_addr_6, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_3 = mul nsw i32 %tempB_0_load_3, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %newIndex15 = or i5 %tmp_4, 6                   ; [#uses=1 type=i5]
  %newIndex16 = zext i5 %newIndex15 to i64        ; [#uses=4 type=i64]
  %tempA_0_addr_7 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex16 ; [#uses=1 type=i32*]
  %tempA_0_load_6 = load i32* %tempA_0_addr_7, align 16, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_4 = mul nsw i32 %tempB_0_load_4, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_7 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex16 ; [#uses=1 type=i32*]
  %tempA_1_load_6 = load i32* %tempA_1_addr_7, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_5 = mul nsw i32 %tempB_0_load_5, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %newIndex17 = or i5 %tmp_4, 7                   ; [#uses=1 type=i5]
  %newIndex18 = zext i5 %newIndex17 to i64        ; [#uses=4 type=i64]
  %tempA_0_addr_8 = getelementptr [32 x i32]* %tempA_0, i64 0, i64 %newIndex18 ; [#uses=1 type=i32*]
  %tempA_0_load_7 = load i32* %tempA_0_addr_8, align 8, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_6 = mul nsw i32 %tempB_0_load_6, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tempA_1_addr_8 = getelementptr [32 x i32]* %tempA_1, i64 0, i64 %newIndex18 ; [#uses=1 type=i32*]
  %tempA_1_load_7 = load i32* %tempA_1_addr_8, align 4, !dbg !53 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_7 = mul nsw i32 %tempB_0_load_7, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp50 = add i32 %tmp_10_1, %tmp_10_1_0_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp51 = add i32 %tmp_10_1_0_3, %tmp_10_1_0_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp49 = add i32 %tmp50, %tmp51, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp53 = add i32 %tmp_10_1_0_5, %tmp_10_1_0_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp54 = add i32 %tmp_10_1_0_7, %tmp_10_1_0_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp52 = add i32 %tmp53, %tmp54, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_0_7 = add nsw i32 %tmp49, %tmp52, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_0_7, i32* %tempResult_0_addr_4, align 16, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_4 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex12 ; [#uses=1 type=i32*]
  %tmp_10_1_1 = mul nsw i32 %tempB_1_load, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_1 = mul nsw i32 %tempB_1_load_1, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_2 = mul nsw i32 %tempB_1_load_2, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_3 = mul nsw i32 %tempB_1_load_3, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_4 = mul nsw i32 %tempB_1_load_4, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_5 = mul nsw i32 %tempB_1_load_5, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_6 = mul nsw i32 %tempB_1_load_6, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_7 = mul nsw i32 %tempB_1_load_7, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp56 = add i32 %tmp_10_1_1, %tmp_10_1_1_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp57 = add i32 %tmp_10_1_1_3, %tmp_10_1_1_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp55 = add i32 %tmp56, %tmp57, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp59 = add i32 %tmp_10_1_1_5, %tmp_10_1_1_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp60 = add i32 %tmp_10_1_1_7, %tmp_10_1_1_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp58 = add i32 %tmp59, %tmp60, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_1_7 = add nsw i32 %tmp55, %tmp58, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_1_7, i32* %tempResult_1_addr_4, align 4, !dbg !53 ; [debug line = 16:5]
  %tempResult_0_addr_5 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex14 ; [#uses=1 type=i32*]
  %tmp_10_1_2 = mul nsw i32 %tempB_0_load_8, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_1 = mul nsw i32 %tempB_0_load_9, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_2 = mul nsw i32 %tempB_0_load_10, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_3 = mul nsw i32 %tempB_0_load_11, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_4 = mul nsw i32 %tempB_0_load_12, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_5 = mul nsw i32 %tempB_0_load_13, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_6 = mul nsw i32 %tempB_0_load_14, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_7 = mul nsw i32 %tempB_0_load_15, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp62 = add i32 %tmp_10_1_2, %tmp_10_1_2_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp63 = add i32 %tmp_10_1_2_3, %tmp_10_1_2_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp61 = add i32 %tmp62, %tmp63, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp65 = add i32 %tmp_10_1_2_5, %tmp_10_1_2_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp66 = add i32 %tmp_10_1_2_7, %tmp_10_1_2_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp64 = add i32 %tmp65, %tmp66, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_2_7 = add nsw i32 %tmp61, %tmp64, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_2_7, i32* %tempResult_0_addr_5, align 8, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_5 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex14 ; [#uses=1 type=i32*]
  %tmp_10_1_3 = mul nsw i32 %tempB_1_load_8, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_1 = mul nsw i32 %tempB_1_load_9, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_2 = mul nsw i32 %tempB_1_load_10, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_3 = mul nsw i32 %tempB_1_load_11, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_4 = mul nsw i32 %tempB_1_load_12, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_5 = mul nsw i32 %tempB_1_load_13, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_6 = mul nsw i32 %tempB_1_load_14, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_7 = mul nsw i32 %tempB_1_load_15, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp68 = add i32 %tmp_10_1_3, %tmp_10_1_3_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp69 = add i32 %tmp_10_1_3_3, %tmp_10_1_3_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp67 = add i32 %tmp68, %tmp69, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp71 = add i32 %tmp_10_1_3_5, %tmp_10_1_3_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp72 = add i32 %tmp_10_1_3_7, %tmp_10_1_3_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp70 = add i32 %tmp71, %tmp72, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_3_7 = add nsw i32 %tmp67, %tmp70, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_3_7, i32* %tempResult_1_addr_5, align 4, !dbg !53 ; [debug line = 16:5]
  %tempResult_0_addr_6 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex16 ; [#uses=1 type=i32*]
  %tmp_10_1_4 = mul nsw i32 %tempB_0_load_16, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_1 = mul nsw i32 %tempB_0_load_17, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_2 = mul nsw i32 %tempB_0_load_18, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_3 = mul nsw i32 %tempB_0_load_19, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_4 = mul nsw i32 %tempB_0_load_20, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_5 = mul nsw i32 %tempB_0_load_21, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_6 = mul nsw i32 %tempB_0_load_22, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_7 = mul nsw i32 %tempB_0_load_23, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp74 = add i32 %tmp_10_1_4, %tmp_10_1_4_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp75 = add i32 %tmp_10_1_4_3, %tmp_10_1_4_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp73 = add i32 %tmp74, %tmp75, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp77 = add i32 %tmp_10_1_4_5, %tmp_10_1_4_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp78 = add i32 %tmp_10_1_4_7, %tmp_10_1_4_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp76 = add i32 %tmp77, %tmp78, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_4_7 = add nsw i32 %tmp73, %tmp76, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_4_7, i32* %tempResult_0_addr_6, align 16, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_6 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex16 ; [#uses=1 type=i32*]
  %tmp_10_1_5 = mul nsw i32 %tempB_1_load_16, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_1 = mul nsw i32 %tempB_1_load_17, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_2 = mul nsw i32 %tempB_1_load_18, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_3 = mul nsw i32 %tempB_1_load_19, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_4 = mul nsw i32 %tempB_1_load_20, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_5 = mul nsw i32 %tempB_1_load_21, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_6 = mul nsw i32 %tempB_1_load_22, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_7 = mul nsw i32 %tempB_1_load_23, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp80 = add i32 %tmp_10_1_5, %tmp_10_1_5_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp81 = add i32 %tmp_10_1_5_3, %tmp_10_1_5_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp79 = add i32 %tmp80, %tmp81, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp83 = add i32 %tmp_10_1_5_5, %tmp_10_1_5_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp84 = add i32 %tmp_10_1_5_7, %tmp_10_1_5_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp82 = add i32 %tmp83, %tmp84, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_5_7 = add nsw i32 %tmp79, %tmp82, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_5_7, i32* %tempResult_1_addr_6, align 4, !dbg !53 ; [debug line = 16:5]
  %tempResult_0_addr_7 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex18 ; [#uses=1 type=i32*]
  %tmp_10_1_6 = mul nsw i32 %tempB_0_load_24, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_1 = mul nsw i32 %tempB_0_load_25, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_2 = mul nsw i32 %tempB_0_load_26, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_3 = mul nsw i32 %tempB_0_load_27, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_4 = mul nsw i32 %tempB_0_load_28, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_5 = mul nsw i32 %tempB_0_load_29, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_6 = mul nsw i32 %tempB_0_load_30, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_7 = mul nsw i32 %tempB_0_load_31, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp86 = add i32 %tmp_10_1_6, %tmp_10_1_6_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp87 = add i32 %tmp_10_1_6_3, %tmp_10_1_6_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp85 = add i32 %tmp86, %tmp87, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp89 = add i32 %tmp_10_1_6_5, %tmp_10_1_6_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp90 = add i32 %tmp_10_1_6_7, %tmp_10_1_6_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp88 = add i32 %tmp89, %tmp90, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_6_7 = add nsw i32 %tmp85, %tmp88, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_6_7, i32* %tempResult_0_addr_7, align 8, !dbg !53 ; [debug line = 16:5]
  %tempResult_1_addr_7 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex18 ; [#uses=1 type=i32*]
  %tmp_10_1_7 = mul nsw i32 %tempB_1_load_24, %tempA_0_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_1 = mul nsw i32 %tempB_1_load_25, %tempA_1_load_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_2 = mul nsw i32 %tempB_1_load_26, %tempA_0_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_3 = mul nsw i32 %tempB_1_load_27, %tempA_1_load_5, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_4 = mul nsw i32 %tempB_1_load_28, %tempA_0_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_5 = mul nsw i32 %tempB_1_load_29, %tempA_1_load_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_6 = mul nsw i32 %tempB_1_load_30, %tempA_0_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_7 = mul nsw i32 %tempB_1_load_31, %tempA_1_load_7, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp92 = add i32 %tmp_10_1_7, %tmp_10_1_7_1, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp93 = add i32 %tmp_10_1_7_3, %tmp_10_1_7_2, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp91 = add i32 %tmp92, %tmp93, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp95 = add i32 %tmp_10_1_7_5, %tmp_10_1_7_4, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp96 = add i32 %tmp_10_1_7_7, %tmp_10_1_7_6, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp94 = add i32 %tmp95, %tmp96, !dbg !53       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_7_7 = add nsw i32 %tmp91, %tmp94, !dbg !53 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_7_7, i32* %tempResult_1_addr_7, align 4, !dbg !53 ; [debug line = 16:5]
  %i_1_1 = add i4 2, %i, !dbg !65                 ; [#uses=1 type=i4] [debug line = 10:25]
  br label %burst.rd.end6.0, !dbg !65             ; [debug line = 10:25]

burst.wr.header:                                  ; preds = %burst.wr.body_ifconv, %burst.wr.header.preheader
  %indvar1 = phi i7 [ %indvar_next2, %burst.wr.body_ifconv ], [ 0, %burst.wr.header.preheader ] ; [#uses=4 type=i7]
  %exitcond5 = icmp eq i7 %indvar1, -64           ; [#uses=1 type=i1]
  %indvar_next2 = add i7 %indvar1, 1              ; [#uses=1 type=i7]
  br i1 %exitcond5, label %memcpy.tail, label %burst.wr.body_ifconv

burst.wr.body_ifconv:                             ; preds = %burst.wr.header
  %empty_10 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstwrite_rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([18 x i8]* @burstwrite_OC_region) nounwind ; [#uses=1 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str10)
  call void (...)* @_ssdm_op_SpecLoopName([29 x i8]* @memcpy_OC_result_OC_s)
  %tmp_97 = trunc i7 %indvar1 to i1               ; [#uses=1 type=i1]
  %newIndex19 = call i6 @_ssdm_op_PartSelect.i6.i7.i32.i32(i7 %indvar1, i32 1, i32 6) ; [#uses=1 type=i6]
  %newIndex20 = zext i6 %newIndex19 to i64        ; [#uses=2 type=i64]
  %tempResult_0_addr_8 = getelementptr [32 x i32]* %tempResult_0, i64 0, i64 %newIndex20, !dbg !61 ; [#uses=1 type=i32*] [debug line = 18:2]
  %tempResult_1_addr_8 = getelementptr [32 x i32]* %tempResult_1, i64 0, i64 %newIndex20, !dbg !61 ; [#uses=1 type=i32*] [debug line = 18:2]
  %tempResult_1_load = load i32* %tempResult_1_addr_8, align 4, !dbg !61 ; [#uses=1 type=i32] [debug line = 18:2]
  %tempResult_0_load = load i32* %tempResult_0_addr_8, align 4, !dbg !61 ; [#uses=1 type=i32] [debug line = 18:2]
  %tempResult_load_phi = select i1 %tmp_97, i32 %tempResult_1_load, i32 %tempResult_0_load, !dbg !61 ; [#uses=1 type=i32] [debug line = 18:2]
  call void @_ssdm_op_Write.m_axi.i32P(i32* %gmem_addr, i32 %tempResult_load_phi, i4 -1), !dbg !61 ; [debug line = 18:2]
  %burstwrite_rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([18 x i8]* @burstwrite_OC_region, i32 %burstwrite_rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.wr.header

memcpy.tail:                                      ; preds = %burst.wr.header
  %gmem_addr_wr_resp = call i1 @_ssdm_op_WriteResp.m_axi.i32P(i32* %gmem_addr), !dbg !61 ; [#uses=0 type=i1] [debug line = 18:2]
  ret void, !dbg !66                              ; [debug line = 19:1]

branch2:                                          ; preds = %burst.rd.body8
  store i32 %gmem_addr_1_read, i32* %tempB_0_addr, align 4, !dbg !52 ; [debug line = 7:2]
  br label %burst.rd.body8420, !dbg !52           ; [debug line = 7:2]

branch3:                                          ; preds = %burst.rd.body8
  store i32 %gmem_addr_1_read, i32* %tempB_1_addr, align 4, !dbg !52 ; [debug line = 7:2]
  br label %burst.rd.body8420, !dbg !52           ; [debug line = 7:2]

branch4:                                          ; preds = %burst.rd.body
  store i32 %gmem_addr_2_read, i32* %tempA_0_addr, align 4, !dbg !51 ; [debug line = 6:2]
  br label %burst.rd.body506, !dbg !51            ; [debug line = 6:2]

branch5:                                          ; preds = %burst.rd.body
  store i32 %gmem_addr_2_read, i32* %tempA_1_addr, align 4, !dbg !51 ; [debug line = 6:2]
  br label %burst.rd.body506, !dbg !51            ; [debug line = 6:2]
}

; [#uses=1]
declare i7 @llvm.part.select.i7(i7, i32, i32) nounwind readnone

; [#uses=1]
declare i32 @llvm.part.select.i32(i32, i32, i32) nounwind readnone

; [#uses=6]
declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

; [#uses=6]
declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone

; [#uses=1]
define weak i1 @_ssdm_op_WriteResp.m_axi.i32P(i32*) {
entry:
  ret i1 true
}

; [#uses=1]
define weak i1 @_ssdm_op_WriteReq.m_axi.i32P(i32*, i32) {
entry:
  ret i1 true
}

; [#uses=1]
define weak void @_ssdm_op_Write.m_axi.i32P(i32*, i32, i4) {
entry:
  ret void
}

; [#uses=1]
define weak void @_ssdm_op_SpecTopModule(...) {
entry:
  ret void
}

; [#uses=4]
define weak i32 @_ssdm_op_SpecRegionEnd(...) {
entry:
  ret i32 0
}

; [#uses=4]
define weak i32 @_ssdm_op_SpecRegionBegin(...) {
entry:
  ret i32 0
}

; [#uses=4]
define weak void @_ssdm_op_SpecPipeline(...) nounwind {
entry:
  ret void
}

; [#uses=4]
define weak i32 @_ssdm_op_SpecLoopTripCount(...) {
entry:
  ret i32 0
}

; [#uses=4]
define weak void @_ssdm_op_SpecLoopName(...) nounwind {
entry:
  ret void
}

; [#uses=5]
define weak void @_ssdm_op_SpecInterface(...) nounwind {
entry:
  ret void
}

; [#uses=1]
define weak void @_ssdm_op_SpecBitsMap(...) {
entry:
  ret void
}

; [#uses=2]
define weak i1 @_ssdm_op_ReadReq.m_axi.i32P(i32*, i32) {
entry:
  ret i1 true
}

; [#uses=3]
define weak i32 @_ssdm_op_Read.s_axilite.i32(i32) {
entry:
  ret i32 %0
}

; [#uses=2]
define weak i32 @_ssdm_op_Read.m_axi.i32P(i32*) {
entry:
  %empty = load i32* %0                           ; [#uses=1 type=i32]
  ret i32 %empty
}

; [#uses=3]
define weak i6 @_ssdm_op_PartSelect.i6.i7.i32.i32(i7, i32, i32) nounwind readnone {
entry:
  %empty = call i7 @llvm.part.select.i7(i7 %0, i32 %1, i32 %2) ; [#uses=1 type=i7]
  %empty_11 = trunc i7 %empty to i6               ; [#uses=1 type=i6]
  ret i6 %empty_11
}

; [#uses=3]
define weak i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32, i32, i32) nounwind readnone {
entry:
  %empty = call i32 @llvm.part.select.i32(i32 %0, i32 %1, i32 %2) ; [#uses=1 type=i32]
  %empty_12 = trunc i32 %empty to i30             ; [#uses=1 type=i30]
  ret i30 %empty_12
}

; [#uses=0]
declare i3 @_ssdm_op_PartSelect.i3.i4.i32.i32(i4, i32, i32) nounwind readnone

; [#uses=0]
declare i1 @_ssdm_op_PartSelect.i1.i7.i32.i32(i7, i32, i32) nounwind readnone

; [#uses=1]
define weak i5 @_ssdm_op_BitConcatenate.i5.i3.i2(i3, i2) nounwind readnone {
entry:
  %empty = zext i3 %0 to i5                       ; [#uses=1 type=i5]
  %empty_13 = zext i2 %1 to i5                    ; [#uses=1 type=i5]
  %empty_14 = shl i5 %empty, 2                    ; [#uses=1 type=i5]
  %empty_15 = or i5 %empty_14, %empty_13          ; [#uses=1 type=i5]
  ret i5 %empty_15
}

!opencl.kernels = !{!0}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}
!axi4.master.portmap = !{!7}
!axi4.slave.bundlemap = !{!8, !9, !10}

!0 = metadata !{null, metadata !1, metadata !2, metadata !3, metadata !4, metadata !5, metadata !6}
!1 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1, i32 1}
!2 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none"}
!3 = metadata !{metadata !"kernel_arg_type", metadata !"int*", metadata !"int*", metadata !"int*"}
!4 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !""}
!5 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B", metadata !"result"}
!6 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!7 = metadata !{metadata !"gmem", metadata !"A", metadata !"READONLY", metadata !"B", metadata !"READONLY", metadata !"result", metadata !"WRITEONLY"}
!8 = metadata !{metadata !"A", metadata !""}
!9 = metadata !{metadata !"B", metadata !""}
!10 = metadata !{metadata !"result", metadata !""}
!11 = metadata !{i32 786689, metadata !12, metadata !"result", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!12 = metadata !{i32 786478, i32 0, metadata !13, metadata !"matrix_mult", metadata !"matrix_mult", metadata !"_Z11matrix_multPiS_S_", metadata !13, i32 4, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !18, i32 4} ; [ DW_TAG_subprogram ]
!13 = metadata !{i32 786473, metadata !"matrix_mult/matrix_mult.cpp", metadata !"/home/hakta/Documents", null} ; [ DW_TAG_file_type ]
!14 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
!15 = metadata !{null, metadata !16, metadata !16, metadata !16}
!16 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !17} ; [ DW_TAG_pointer_type ]
!17 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
!18 = metadata !{metadata !19}
!19 = metadata !{i32 786468}                      ; [ DW_TAG_base_type ]
!20 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 2048, i64 32, i32 0, i32 0, metadata !17, metadata !21, i32 0, i32 0} ; [ DW_TAG_array_type ]
!21 = metadata !{metadata !22}
!22 = metadata !{i32 786465, i64 0, i64 63}       ; [ DW_TAG_subrange_type ]
!23 = metadata !{i32 4, i32 46, metadata !12, null}
!24 = metadata !{i32 786689, metadata !12, metadata !"B", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!25 = metadata !{i32 4, i32 34, metadata !12, null}
!26 = metadata !{i32 786689, metadata !12, metadata !"A", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!27 = metadata !{i32 4, i32 22, metadata !12, null}
!28 = metadata !{metadata !29}
!29 = metadata !{i32 0, i32 31, metadata !30}
!30 = metadata !{metadata !31, metadata !34, metadata !35}
!31 = metadata !{metadata !"A", metadata !32, metadata !"int", i32 0, i32 31}
!32 = metadata !{metadata !33}
!33 = metadata !{i32 0, i32 63, i32 1}
!34 = metadata !{metadata !"B", metadata !32, metadata !"int", i32 0, i32 31}
!35 = metadata !{metadata !"result", metadata !32, metadata !"int", i32 0, i32 31}
!36 = metadata !{i32 5, i32 1, metadata !37, null}
!37 = metadata !{i32 786443, metadata !12, i32 4, i32 59, metadata !13, i32 0} ; [ DW_TAG_lexical_block ]
!38 = metadata !{i32 790529, metadata !39, metadata !"tempA[0]", null, i32 5, metadata !40, i32 0, i32 0} ; [ DW_TAG_auto_variable_field ]
!39 = metadata !{i32 786688, metadata !37, metadata !"tempA", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!40 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 1024, i64 32, i32 0, i32 0, metadata !17, metadata !21, i32 0, i32 0} ; [ DW_TAG_array_type ]
!41 = metadata !{i32 5, i32 6, metadata !37, null}
!42 = metadata !{i32 790529, metadata !39, metadata !"tempA[1]", null, i32 5, metadata !40, i32 0, i32 0} ; [ DW_TAG_auto_variable_field ]
!43 = metadata !{i32 790529, metadata !44, metadata !"tempB[0]", null, i32 5, metadata !40, i32 0, i32 0} ; [ DW_TAG_auto_variable_field ]
!44 = metadata !{i32 786688, metadata !37, metadata !"tempB", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!45 = metadata !{i32 5, i32 18, metadata !37, null}
!46 = metadata !{i32 790529, metadata !44, metadata !"tempB[1]", null, i32 5, metadata !40, i32 0, i32 0} ; [ DW_TAG_auto_variable_field ]
!47 = metadata !{i32 790529, metadata !48, metadata !"tempResult[0]", null, i32 5, metadata !40, i32 0, i32 0} ; [ DW_TAG_auto_variable_field ]
!48 = metadata !{i32 786688, metadata !37, metadata !"tempResult", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!49 = metadata !{i32 5, i32 30, metadata !37, null}
!50 = metadata !{i32 790529, metadata !48, metadata !"tempResult[1]", null, i32 5, metadata !40, i32 0, i32 0} ; [ DW_TAG_auto_variable_field ]
!51 = metadata !{i32 6, i32 2, metadata !37, null}
!52 = metadata !{i32 7, i32 2, metadata !37, null}
!53 = metadata !{i32 16, i32 5, metadata !54, null}
!54 = metadata !{i32 786443, metadata !55, i32 16, i32 5, metadata !13, i32 6} ; [ DW_TAG_lexical_block ]
!55 = metadata !{i32 786443, metadata !56, i32 15, i32 4, metadata !13, i32 5} ; [ DW_TAG_lexical_block ]
!56 = metadata !{i32 786443, metadata !57, i32 12, i32 31, metadata !13, i32 4} ; [ DW_TAG_lexical_block ]
!57 = metadata !{i32 786443, metadata !58, i32 12, i32 3, metadata !13, i32 3} ; [ DW_TAG_lexical_block ]
!58 = metadata !{i32 786443, metadata !59, i32 12, i32 1, metadata !13, i32 2} ; [ DW_TAG_lexical_block ]
!59 = metadata !{i32 786443, metadata !37, i32 10, i32 2, metadata !13, i32 1} ; [ DW_TAG_lexical_block ]
!60 = metadata !{i32 10, i32 16, metadata !59, null}
!61 = metadata !{i32 18, i32 2, metadata !37, null}
!62 = metadata !{i32 12, i32 2, metadata !58, null}
!63 = metadata !{i32 12, i32 1, metadata !58, null}
!64 = metadata !{i32 16, i32 61, metadata !57, null}
!65 = metadata !{i32 10, i32 25, metadata !59, null}
!66 = metadata !{i32 19, i32 1, metadata !37, null}