; ModuleID = '/home/hakta/Documents/matrix_mult/solution2/.autopilot/db/a.o.3.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mode5 = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@mode3 = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@mode = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@memcpy_OC_tempB_OC_B = internal unnamed_addr constant [15 x i8] c"memcpy.tempB.B\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_tempA_OC_A = internal unnamed_addr constant [15 x i8] c"memcpy.tempA.A\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_result_OC_s = internal unnamed_addr constant [29 x i8] c"memcpy.result.tempResult.gep\00" ; [#uses=1 type=[29 x i8]*]
@matrix_mult_str = internal unnamed_addr constant [12 x i8] c"matrix_mult\00" ; [#uses=1 type=[12 x i8]*]
@burstwrite_OC_region = internal unnamed_addr constant [18 x i8] c"burstwrite.region\00" ; [#uses=2 type=[18 x i8]*]
@burstread_OC_region_s = internal unnamed_addr constant [17 x i8] c"burstread.region\00" ; [#uses=4 type=[17 x i8]*]
@bundle6 = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@bundle4 = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@bundle = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str9 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str8 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str7 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str4 = private unnamed_addr constant [24 x i8] c"matrix_mult__outer_loop\00", align 1 ; [#uses=3 type=[24 x i8]*]
@p_str3 = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1 ; [#uses=1 type=[10 x i8]*]
@p_str2 = private unnamed_addr constant [6 x i8] c"slave\00", align 1 ; [#uses=4 type=[6 x i8]*]
@p_str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 ; [#uses=24 type=[1 x i8]*]
@p_str = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1 ; [#uses=1 type=[6 x i8]*]

; [#uses=0]
define void @matrix_mult(i32* %gmem, i32 %A, i32 %B, i32 %result) {
  %result_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %result) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %result_read}, i64 0, metadata !11), !dbg !23 ; [debug line = 4:46] [debug variable = result]
  %B_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %B) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %B_read}, i64 0, metadata !24), !dbg !25 ; [debug line = 4:34] [debug variable = B]
  %A_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %A) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %A_read}, i64 0, metadata !26), !dbg !27 ; [debug line = 4:22] [debug variable = A]
  %result5 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %result_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_4 = zext i30 %result5 to i64               ; [#uses=1 type=i64]
  %gmem_addr = getelementptr i32* %gmem, i64 %tmp_4 ; [#uses=3 type=i32*]
  %B3 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %B_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_5 = zext i30 %B3 to i64                    ; [#uses=1 type=i64]
  %gmem_addr_1 = getelementptr i32* %gmem, i64 %tmp_5 ; [#uses=2 type=i32*]
  %A1 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %A_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_7 = zext i30 %A1 to i64                    ; [#uses=1 type=i64]
  %gmem_addr_2 = getelementptr i32* %gmem, i64 %tmp_7 ; [#uses=2 type=i32*]
  call void (...)* @_ssdm_op_SpecBitsMap(i32* %gmem), !map !28
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @matrix_mult_str) nounwind
  %tempA = alloca [64 x i32], align 16            ; [#uses=33 type=[64 x i32]*]
  %tempB = alloca [64 x i32], align 16            ; [#uses=65 type=[64 x i32]*]
  %tempResult = alloca [64 x i32], align 16       ; [#uses=33 type=[64 x i32]*]
  call void @llvm.dbg.value(metadata !{i32 %A}, i64 0, metadata !26), !dbg !27 ; [debug line = 4:22] [debug variable = A]
  call void @llvm.dbg.value(metadata !{i32 %B}, i64 0, metadata !24), !dbg !25 ; [debug line = 4:34] [debug variable = B]
  call void @llvm.dbg.value(metadata !{i32 %result}, i64 0, metadata !11), !dbg !23 ; [debug line = 4:46] [debug variable = result]
  call void (...)* @_ssdm_op_SpecInterface(i32 %result, [10 x i8]* @mode5, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle6, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %B, [10 x i8]* @mode3, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle4, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32* %gmem, [6 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @p_str1, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %A, [10 x i8]* @mode, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @p_str3, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind, !dbg !36 ; [debug line = 5:1]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempA}, metadata !38), !dbg !39 ; [debug line = 5:6] [debug variable = tempA]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempB}, metadata !40), !dbg !41 ; [debug line = 5:18] [debug variable = tempB]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempResult}, metadata !42), !dbg !43 ; [debug line = 5:30] [debug variable = tempResult]
  %gmem_addr_2_rd_req = call i1 @_ssdm_op_ReadReq.m_axi.i32P(i32* %gmem_addr_2, i32 64), !dbg !44 ; [#uses=0 type=i1] [debug line = 6:2]
  br label %burst.rd.header

burst.rd.header:                                  ; preds = %burst.rd.body, %0
  %indvar = phi i7 [ 0, %0 ], [ %indvar_next, %burst.rd.body ] ; [#uses=3 type=i7]
  %exitcond3 = icmp eq i7 %indvar, -64            ; [#uses=1 type=i1]
  %indvar_next = add i7 %indvar, 1                ; [#uses=1 type=i7]
  br i1 %exitcond3, label %burst.rd.header7.preheader, label %burst.rd.body

burst.rd.header7.preheader:                       ; preds = %burst.rd.header
  %gmem_addr_1_rd_req = call i1 @_ssdm_op_ReadReq.m_axi.i32P(i32* %gmem_addr_1, i32 64), !dbg !45 ; [#uses=0 type=i1] [debug line = 7:2]
  br label %burst.rd.header7

burst.rd.body:                                    ; preds = %burst.rd.header
  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstread_rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region_s) nounwind ; [#uses=1 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str7)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempA_OC_A)
  %tmp = zext i7 %indvar to i64, !dbg !44         ; [#uses=1 type=i64] [debug line = 6:2]
  %gmem_addr_2_read = call i32 @_ssdm_op_Read.m_axi.i32P(i32* %gmem_addr_2), !dbg !44 ; [#uses=1 type=i32] [debug line = 6:2]
  %tempA_addr = getelementptr [64 x i32]* %tempA, i64 0, i64 %tmp, !dbg !44 ; [#uses=1 type=i32*] [debug line = 6:2]
  store i32 %gmem_addr_2_read, i32* %tempA_addr, align 4, !dbg !44 ; [debug line = 6:2]
  %burstread_rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region_s, i32 %burstread_rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header

burst.rd.header7:                                 ; preds = %burst.rd.body8, %burst.rd.header7.preheader
  %indvar9 = phi i7 [ %indvar_next1, %burst.rd.body8 ], [ 0, %burst.rd.header7.preheader ] ; [#uses=3 type=i7]
  %exitcond4 = icmp eq i7 %indvar9, -64           ; [#uses=1 type=i1]
  %indvar_next1 = add i7 %indvar9, 1              ; [#uses=1 type=i7]
  br i1 %exitcond4, label %burst.rd.end6.0.preheader, label %burst.rd.body8

burst.rd.end6.0.preheader:                        ; preds = %burst.rd.header7
  %tempB_addr_1 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 0, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load = load i32* %tempB_addr_1, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_2 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 8, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_1 = load i32* %tempB_addr_2, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_3 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 16, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_2 = load i32* %tempB_addr_3, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_4 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 24, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_3 = load i32* %tempB_addr_4, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_5 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 32, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_4 = load i32* %tempB_addr_5, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_6 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 40, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_5 = load i32* %tempB_addr_6, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_7 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 48, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_6 = load i32* %tempB_addr_7, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_8 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 56, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_7 = load i32* %tempB_addr_8, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_9 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 1, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_8 = load i32* %tempB_addr_9, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_10 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 9, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_9 = load i32* %tempB_addr_10, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_11 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 17, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_10 = load i32* %tempB_addr_11, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_12 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 25, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_11 = load i32* %tempB_addr_12, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_13 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 33, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_12 = load i32* %tempB_addr_13, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_14 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 41, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_13 = load i32* %tempB_addr_14, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_15 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 49, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_14 = load i32* %tempB_addr_15, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_16 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 57, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_15 = load i32* %tempB_addr_16, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_17 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 2, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_16 = load i32* %tempB_addr_17, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_18 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 10, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_17 = load i32* %tempB_addr_18, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_19 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 18, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_18 = load i32* %tempB_addr_19, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_20 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 26, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_19 = load i32* %tempB_addr_20, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_21 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 34, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_20 = load i32* %tempB_addr_21, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_22 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 42, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_21 = load i32* %tempB_addr_22, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_23 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 50, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_22 = load i32* %tempB_addr_23, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_24 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 58, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_23 = load i32* %tempB_addr_24, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_25 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 3, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_24 = load i32* %tempB_addr_25, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_26 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 11, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_25 = load i32* %tempB_addr_26, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_27 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 19, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_26 = load i32* %tempB_addr_27, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_28 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 27, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_27 = load i32* %tempB_addr_28, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_29 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 35, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_28 = load i32* %tempB_addr_29, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_30 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 43, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_29 = load i32* %tempB_addr_30, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_31 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 51, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_30 = load i32* %tempB_addr_31, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_32 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 59, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_31 = load i32* %tempB_addr_32, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_33 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 4, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_32 = load i32* %tempB_addr_33, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_34 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 12, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_33 = load i32* %tempB_addr_34, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_35 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 20, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_34 = load i32* %tempB_addr_35, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_36 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 28, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_35 = load i32* %tempB_addr_36, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_37 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 36, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_36 = load i32* %tempB_addr_37, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_38 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 44, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_37 = load i32* %tempB_addr_38, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_39 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 52, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_38 = load i32* %tempB_addr_39, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_40 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 60, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_39 = load i32* %tempB_addr_40, align 16, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_41 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 5, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_40 = load i32* %tempB_addr_41, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_42 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 13, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_41 = load i32* %tempB_addr_42, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_43 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 21, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_42 = load i32* %tempB_addr_43, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_44 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 29, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_43 = load i32* %tempB_addr_44, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_45 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 37, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_44 = load i32* %tempB_addr_45, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_46 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 45, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_45 = load i32* %tempB_addr_46, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_47 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 53, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_46 = load i32* %tempB_addr_47, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_48 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 61, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_47 = load i32* %tempB_addr_48, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_49 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 6, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_48 = load i32* %tempB_addr_49, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_50 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 14, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_49 = load i32* %tempB_addr_50, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_51 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 22, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_50 = load i32* %tempB_addr_51, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_52 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 30, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_51 = load i32* %tempB_addr_52, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_53 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 38, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_52 = load i32* %tempB_addr_53, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_54 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 46, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_53 = load i32* %tempB_addr_54, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_55 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 54, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_54 = load i32* %tempB_addr_55, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_56 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 62, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_55 = load i32* %tempB_addr_56, align 8, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_57 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 7, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_56 = load i32* %tempB_addr_57, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_58 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 15, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_57 = load i32* %tempB_addr_58, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_59 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 23, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_58 = load i32* %tempB_addr_59, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_60 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 31, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_59 = load i32* %tempB_addr_60, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_61 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 39, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_60 = load i32* %tempB_addr_61, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_62 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 47, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_61 = load i32* %tempB_addr_62, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_63 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 55, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_62 = load i32* %tempB_addr_63, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB_addr_64 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 63, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load_63 = load i32* %tempB_addr_64, align 4, !dbg !46 ; [#uses=4 type=i32] [debug line = 16:5]
  br label %burst.rd.end6.0

burst.rd.body8:                                   ; preds = %burst.rd.header7
  %empty_5 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstread_rbegin1 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region_s) nounwind ; [#uses=1 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str8)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempB_OC_B)
  %tmp_1 = zext i7 %indvar9 to i64, !dbg !45      ; [#uses=1 type=i64] [debug line = 7:2]
  %gmem_addr_1_read = call i32 @_ssdm_op_Read.m_axi.i32P(i32* %gmem_addr_1), !dbg !45 ; [#uses=1 type=i32] [debug line = 7:2]
  %tempB_addr = getelementptr [64 x i32]* %tempB, i64 0, i64 %tmp_1, !dbg !45 ; [#uses=1 type=i32*] [debug line = 7:2]
  store i32 %gmem_addr_1_read, i32* %tempB_addr, align 4, !dbg !45 ; [debug line = 7:2]
  %burstread_rend14 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region_s, i32 %burstread_rbegin1) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header7

burst.rd.end6.0:                                  ; preds = %burst.rd.end6.1, %burst.rd.end6.0.preheader
  %i = phi i4 [ %i_1_3, %burst.rd.end6.1 ], [ 0, %burst.rd.end6.0.preheader ] ; [#uses=3 type=i4]
  %exitcond2 = icmp eq i4 %i, -8, !dbg !53        ; [#uses=1 type=i1] [debug line = 10:16]
  br i1 %exitcond2, label %burst.wr.header.preheader, label %burst.rd.end6.1, !dbg !53 ; [debug line = 10:16]

burst.wr.header.preheader:                        ; preds = %burst.rd.end6.0
  %gmem_addr_wr_req = call i1 @_ssdm_op_WriteReq.m_axi.i32P(i32* %gmem_addr, i32 64), !dbg !54 ; [#uses=0 type=i1] [debug line = 18:2]
  br label %burst.wr.header

burst.rd.end6.1:                                  ; preds = %burst.rd.end6.0
  %empty_6 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 2, i64 2, i64 2) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecLoopName([24 x i8]* @p_str4) nounwind, !dbg !55 ; [debug line = 12:2]
  %tmp_2 = call i32 (...)* @_ssdm_op_SpecRegionBegin([24 x i8]* @p_str4) nounwind, !dbg !55 ; [#uses=1 type=i32] [debug line = 12:2]
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind, !dbg !56 ; [debug line = 12:1]
  %tmp_8 = trunc i4 %i to i3                      ; [#uses=1 type=i3]
  %tmp_s = call i6 @_ssdm_op_BitConcatenate.i6.i3.i3(i3 %tmp_8, i3 0), !dbg !57 ; [#uses=32 type=i6] [debug line = 13:4]
  %tmp_6 = zext i6 %tmp_s to i64, !dbg !57        ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult_addr_1 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_6, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA_addr_1 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_6, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load = load i32* %tempA_addr_1, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_9 = mul nsw i32 %tempB_load, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_s = or i6 %tmp_s, 1, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_1 = zext i6 %tmp_8_0_0_s to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_2 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_1, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_1 = load i32* %tempA_addr_2, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_1 = mul nsw i32 %tempB_load_1, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_1 = or i6 %tmp_s, 2, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_2 = zext i6 %tmp_8_0_0_1 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_3 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_2, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_2 = load i32* %tempA_addr_3, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_2 = mul nsw i32 %tempB_load_2, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_2 = or i6 %tmp_s, 3, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_3 = zext i6 %tmp_8_0_0_2 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_4 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_3, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_3 = load i32* %tempA_addr_4, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_3 = mul nsw i32 %tempB_load_3, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_3 = or i6 %tmp_s, 4, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_4 = zext i6 %tmp_8_0_0_3 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_5 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_4, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_4 = load i32* %tempA_addr_5, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_4 = mul nsw i32 %tempB_load_4, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_4 = or i6 %tmp_s, 5, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_5 = zext i6 %tmp_8_0_0_4 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_6 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_5, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_5 = load i32* %tempA_addr_6, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_5 = mul nsw i32 %tempB_load_5, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_5 = or i6 %tmp_s, 6, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_6 = zext i6 %tmp_8_0_0_5 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_7 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_6, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_6 = load i32* %tempA_addr_7, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_6 = mul nsw i32 %tempB_load_6, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_0_0_6 = or i6 %tmp_s, 7, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_0_0_7 = zext i6 %tmp_8_0_0_6 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_8 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_0_0_7, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_7 = load i32* %tempA_addr_8, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_0_0_7 = mul nsw i32 %tempB_load_7, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp2 = add i32 %tmp_9, %tmp_10_0_0_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp3 = add i32 %tmp_10_0_0_3, %tmp_10_0_0_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp1 = add i32 %tmp2, %tmp3, !dbg !46          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp5 = add i32 %tmp_10_0_0_5, %tmp_10_0_0_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp6 = add i32 %tmp_10_0_0_7, %tmp_10_0_0_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp4 = add i32 %tmp5, %tmp6, !dbg !46          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_0_7 = add nsw i32 %tmp1, %tmp4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_0_7, i32* %tempResult_addr_1, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_2 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_1, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_1 = mul nsw i32 %tempB_load_8, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_1 = mul nsw i32 %tempB_load_9, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_2 = mul nsw i32 %tempB_load_10, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_3 = mul nsw i32 %tempB_load_11, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_4 = mul nsw i32 %tempB_load_12, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_5 = mul nsw i32 %tempB_load_13, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_6 = mul nsw i32 %tempB_load_14, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_1_7 = mul nsw i32 %tempB_load_15, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp8 = add i32 %tmp_10_0_1, %tmp_10_0_1_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp9 = add i32 %tmp_10_0_1_3, %tmp_10_0_1_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp7 = add i32 %tmp8, %tmp9, !dbg !46          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp11 = add i32 %tmp_10_0_1_5, %tmp_10_0_1_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp12 = add i32 %tmp_10_0_1_7, %tmp_10_0_1_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp10 = add i32 %tmp11, %tmp12, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_1_7 = add nsw i32 %tmp7, %tmp10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_1_7, i32* %tempResult_addr_2, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_3 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_2, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_2 = mul nsw i32 %tempB_load_16, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_1 = mul nsw i32 %tempB_load_17, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_2 = mul nsw i32 %tempB_load_18, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_3 = mul nsw i32 %tempB_load_19, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_4 = mul nsw i32 %tempB_load_20, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_5 = mul nsw i32 %tempB_load_21, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_6 = mul nsw i32 %tempB_load_22, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_2_7 = mul nsw i32 %tempB_load_23, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp14 = add i32 %tmp_10_0_2, %tmp_10_0_2_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp15 = add i32 %tmp_10_0_2_3, %tmp_10_0_2_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp13 = add i32 %tmp14, %tmp15, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp17 = add i32 %tmp_10_0_2_5, %tmp_10_0_2_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp18 = add i32 %tmp_10_0_2_7, %tmp_10_0_2_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp16 = add i32 %tmp17, %tmp18, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_2_7 = add nsw i32 %tmp13, %tmp16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_2_7, i32* %tempResult_addr_3, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_4 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_3, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_3 = mul nsw i32 %tempB_load_24, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_1 = mul nsw i32 %tempB_load_25, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_2 = mul nsw i32 %tempB_load_26, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_3 = mul nsw i32 %tempB_load_27, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_4 = mul nsw i32 %tempB_load_28, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_5 = mul nsw i32 %tempB_load_29, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_6 = mul nsw i32 %tempB_load_30, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_3_7 = mul nsw i32 %tempB_load_31, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp20 = add i32 %tmp_10_0_3, %tmp_10_0_3_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp21 = add i32 %tmp_10_0_3_3, %tmp_10_0_3_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp19 = add i32 %tmp20, %tmp21, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp23 = add i32 %tmp_10_0_3_5, %tmp_10_0_3_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp24 = add i32 %tmp_10_0_3_7, %tmp_10_0_3_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp22 = add i32 %tmp23, %tmp24, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_3_7 = add nsw i32 %tmp19, %tmp22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_3_7, i32* %tempResult_addr_4, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_5 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_4, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_4 = mul nsw i32 %tempB_load_32, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_1 = mul nsw i32 %tempB_load_33, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_2 = mul nsw i32 %tempB_load_34, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_3 = mul nsw i32 %tempB_load_35, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_4 = mul nsw i32 %tempB_load_36, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_5 = mul nsw i32 %tempB_load_37, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_6 = mul nsw i32 %tempB_load_38, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_4_7 = mul nsw i32 %tempB_load_39, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp26 = add i32 %tmp_10_0_4, %tmp_10_0_4_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp27 = add i32 %tmp_10_0_4_3, %tmp_10_0_4_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp25 = add i32 %tmp26, %tmp27, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp29 = add i32 %tmp_10_0_4_5, %tmp_10_0_4_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp30 = add i32 %tmp_10_0_4_7, %tmp_10_0_4_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp28 = add i32 %tmp29, %tmp30, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_4_7 = add nsw i32 %tmp25, %tmp28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_4_7, i32* %tempResult_addr_5, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_6 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_5, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_5 = mul nsw i32 %tempB_load_40, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_1 = mul nsw i32 %tempB_load_41, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_2 = mul nsw i32 %tempB_load_42, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_3 = mul nsw i32 %tempB_load_43, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_4 = mul nsw i32 %tempB_load_44, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_5 = mul nsw i32 %tempB_load_45, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_6 = mul nsw i32 %tempB_load_46, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_5_7 = mul nsw i32 %tempB_load_47, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp32 = add i32 %tmp_10_0_5, %tmp_10_0_5_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp33 = add i32 %tmp_10_0_5_3, %tmp_10_0_5_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp31 = add i32 %tmp32, %tmp33, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp35 = add i32 %tmp_10_0_5_5, %tmp_10_0_5_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp36 = add i32 %tmp_10_0_5_7, %tmp_10_0_5_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp34 = add i32 %tmp35, %tmp36, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_5_7 = add nsw i32 %tmp31, %tmp34, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_5_7, i32* %tempResult_addr_6, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_7 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_6, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_6 = mul nsw i32 %tempB_load_48, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_1 = mul nsw i32 %tempB_load_49, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_2 = mul nsw i32 %tempB_load_50, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_3 = mul nsw i32 %tempB_load_51, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_4 = mul nsw i32 %tempB_load_52, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_5 = mul nsw i32 %tempB_load_53, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_6 = mul nsw i32 %tempB_load_54, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_6_7 = mul nsw i32 %tempB_load_55, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp38 = add i32 %tmp_10_0_6, %tmp_10_0_6_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp39 = add i32 %tmp_10_0_6_3, %tmp_10_0_6_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp37 = add i32 %tmp38, %tmp39, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp41 = add i32 %tmp_10_0_6_5, %tmp_10_0_6_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp42 = add i32 %tmp_10_0_6_7, %tmp_10_0_6_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp40 = add i32 %tmp41, %tmp42, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_6_7 = add nsw i32 %tmp37, %tmp40, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_6_7, i32* %tempResult_addr_7, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_8 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_0_0_7, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_0_7 = mul nsw i32 %tempB_load_56, %tempA_load, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_1 = mul nsw i32 %tempB_load_57, %tempA_load_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_2 = mul nsw i32 %tempB_load_58, %tempA_load_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_3 = mul nsw i32 %tempB_load_59, %tempA_load_3, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_4 = mul nsw i32 %tempB_load_60, %tempA_load_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_5 = mul nsw i32 %tempB_load_61, %tempA_load_5, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_6 = mul nsw i32 %tempB_load_62, %tempA_load_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_0_7_7 = mul nsw i32 %tempB_load_63, %tempA_load_7, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp44 = add i32 %tmp_10_0_7, %tmp_10_0_7_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp45 = add i32 %tmp_10_0_7_3, %tmp_10_0_7_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp43 = add i32 %tmp44, %tmp45, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp47 = add i32 %tmp_10_0_7_5, %tmp_10_0_7_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp48 = add i32 %tmp_10_0_7_7, %tmp_10_0_7_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp46 = add i32 %tmp47, %tmp48, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_0_7_7 = add nsw i32 %tmp43, %tmp46, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_0_7_7, i32* %tempResult_addr_8, align 4, !dbg !46 ; [debug line = 16:5]
  %empty_7 = call i32 (...)* @_ssdm_op_SpecRegionEnd([24 x i8]* @p_str4, i32 %tmp_2) nounwind, !dbg !58 ; [#uses=0 type=i32] [debug line = 16:61]
  %tmp_2_1 = or i6 %tmp_s, 8, !dbg !57            ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp_6_1 = zext i6 %tmp_2_1 to i64, !dbg !57    ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult_addr_9 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_6_1, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA_addr_9 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_6_1, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_8 = load i32* %tempA_addr_9, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1 = mul nsw i32 %tempB_load, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_s = or i6 %tmp_s, 9, !dbg !46        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_1 = zext i6 %tmp_8_1_0_s to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_10 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_1, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_9 = load i32* %tempA_addr_10, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_1 = mul nsw i32 %tempB_load_1, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_1 = or i6 %tmp_s, 10, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_2 = zext i6 %tmp_8_1_0_1 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_11 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_2, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_10 = load i32* %tempA_addr_11, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_2 = mul nsw i32 %tempB_load_2, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_2 = or i6 %tmp_s, 11, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_3 = zext i6 %tmp_8_1_0_2 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_12 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_3, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_11 = load i32* %tempA_addr_12, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_3 = mul nsw i32 %tempB_load_3, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_3 = or i6 %tmp_s, 12, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_4 = zext i6 %tmp_8_1_0_3 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_13 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_4, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_12 = load i32* %tempA_addr_13, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_4 = mul nsw i32 %tempB_load_4, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_4 = or i6 %tmp_s, 13, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_5 = zext i6 %tmp_8_1_0_4 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_14 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_5, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_13 = load i32* %tempA_addr_14, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_5 = mul nsw i32 %tempB_load_5, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_5 = or i6 %tmp_s, 14, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_6 = zext i6 %tmp_8_1_0_5 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_15 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_6, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_14 = load i32* %tempA_addr_15, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_6 = mul nsw i32 %tempB_load_6, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_1_0_6 = or i6 %tmp_s, 15, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_1_0_7 = zext i6 %tmp_8_1_0_6 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_16 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_1_0_7, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_15 = load i32* %tempA_addr_16, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_1_0_7 = mul nsw i32 %tempB_load_7, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp50 = add i32 %tmp_10_1, %tmp_10_1_0_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp51 = add i32 %tmp_10_1_0_3, %tmp_10_1_0_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp49 = add i32 %tmp50, %tmp51, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp53 = add i32 %tmp_10_1_0_5, %tmp_10_1_0_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp54 = add i32 %tmp_10_1_0_7, %tmp_10_1_0_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp52 = add i32 %tmp53, %tmp54, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_0_7 = add nsw i32 %tmp49, %tmp52, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_0_7, i32* %tempResult_addr_9, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_10 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_1, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_1 = mul nsw i32 %tempB_load_8, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_1 = mul nsw i32 %tempB_load_9, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_2 = mul nsw i32 %tempB_load_10, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_3 = mul nsw i32 %tempB_load_11, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_4 = mul nsw i32 %tempB_load_12, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_5 = mul nsw i32 %tempB_load_13, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_6 = mul nsw i32 %tempB_load_14, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_1_7 = mul nsw i32 %tempB_load_15, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp56 = add i32 %tmp_10_1_1, %tmp_10_1_1_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp57 = add i32 %tmp_10_1_1_3, %tmp_10_1_1_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp55 = add i32 %tmp56, %tmp57, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp59 = add i32 %tmp_10_1_1_5, %tmp_10_1_1_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp60 = add i32 %tmp_10_1_1_7, %tmp_10_1_1_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp58 = add i32 %tmp59, %tmp60, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_1_7 = add nsw i32 %tmp55, %tmp58, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_1_7, i32* %tempResult_addr_10, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_11 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_2, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_2 = mul nsw i32 %tempB_load_16, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_1 = mul nsw i32 %tempB_load_17, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_2 = mul nsw i32 %tempB_load_18, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_3 = mul nsw i32 %tempB_load_19, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_4 = mul nsw i32 %tempB_load_20, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_5 = mul nsw i32 %tempB_load_21, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_6 = mul nsw i32 %tempB_load_22, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_2_7 = mul nsw i32 %tempB_load_23, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp62 = add i32 %tmp_10_1_2, %tmp_10_1_2_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp63 = add i32 %tmp_10_1_2_3, %tmp_10_1_2_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp61 = add i32 %tmp62, %tmp63, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp65 = add i32 %tmp_10_1_2_5, %tmp_10_1_2_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp66 = add i32 %tmp_10_1_2_7, %tmp_10_1_2_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp64 = add i32 %tmp65, %tmp66, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_2_7 = add nsw i32 %tmp61, %tmp64, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_2_7, i32* %tempResult_addr_11, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_12 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_3, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_3 = mul nsw i32 %tempB_load_24, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_1 = mul nsw i32 %tempB_load_25, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_2 = mul nsw i32 %tempB_load_26, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_3 = mul nsw i32 %tempB_load_27, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_4 = mul nsw i32 %tempB_load_28, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_5 = mul nsw i32 %tempB_load_29, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_6 = mul nsw i32 %tempB_load_30, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_3_7 = mul nsw i32 %tempB_load_31, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp68 = add i32 %tmp_10_1_3, %tmp_10_1_3_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp69 = add i32 %tmp_10_1_3_3, %tmp_10_1_3_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp67 = add i32 %tmp68, %tmp69, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp71 = add i32 %tmp_10_1_3_5, %tmp_10_1_3_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp72 = add i32 %tmp_10_1_3_7, %tmp_10_1_3_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp70 = add i32 %tmp71, %tmp72, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_3_7 = add nsw i32 %tmp67, %tmp70, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_3_7, i32* %tempResult_addr_12, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_13 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_4, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_4 = mul nsw i32 %tempB_load_32, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_1 = mul nsw i32 %tempB_load_33, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_2 = mul nsw i32 %tempB_load_34, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_3 = mul nsw i32 %tempB_load_35, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_4 = mul nsw i32 %tempB_load_36, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_5 = mul nsw i32 %tempB_load_37, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_6 = mul nsw i32 %tempB_load_38, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_4_7 = mul nsw i32 %tempB_load_39, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp74 = add i32 %tmp_10_1_4, %tmp_10_1_4_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp75 = add i32 %tmp_10_1_4_3, %tmp_10_1_4_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp73 = add i32 %tmp74, %tmp75, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp77 = add i32 %tmp_10_1_4_5, %tmp_10_1_4_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp78 = add i32 %tmp_10_1_4_7, %tmp_10_1_4_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp76 = add i32 %tmp77, %tmp78, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_4_7 = add nsw i32 %tmp73, %tmp76, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_4_7, i32* %tempResult_addr_13, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_14 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_5, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_5 = mul nsw i32 %tempB_load_40, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_1 = mul nsw i32 %tempB_load_41, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_2 = mul nsw i32 %tempB_load_42, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_3 = mul nsw i32 %tempB_load_43, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_4 = mul nsw i32 %tempB_load_44, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_5 = mul nsw i32 %tempB_load_45, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_6 = mul nsw i32 %tempB_load_46, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_5_7 = mul nsw i32 %tempB_load_47, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp80 = add i32 %tmp_10_1_5, %tmp_10_1_5_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp81 = add i32 %tmp_10_1_5_3, %tmp_10_1_5_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp79 = add i32 %tmp80, %tmp81, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp83 = add i32 %tmp_10_1_5_5, %tmp_10_1_5_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp84 = add i32 %tmp_10_1_5_7, %tmp_10_1_5_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp82 = add i32 %tmp83, %tmp84, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_5_7 = add nsw i32 %tmp79, %tmp82, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_5_7, i32* %tempResult_addr_14, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_15 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_6, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_6 = mul nsw i32 %tempB_load_48, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_1 = mul nsw i32 %tempB_load_49, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_2 = mul nsw i32 %tempB_load_50, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_3 = mul nsw i32 %tempB_load_51, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_4 = mul nsw i32 %tempB_load_52, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_5 = mul nsw i32 %tempB_load_53, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_6 = mul nsw i32 %tempB_load_54, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_6_7 = mul nsw i32 %tempB_load_55, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp86 = add i32 %tmp_10_1_6, %tmp_10_1_6_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp87 = add i32 %tmp_10_1_6_3, %tmp_10_1_6_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp85 = add i32 %tmp86, %tmp87, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp89 = add i32 %tmp_10_1_6_5, %tmp_10_1_6_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp90 = add i32 %tmp_10_1_6_7, %tmp_10_1_6_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp88 = add i32 %tmp89, %tmp90, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_6_7 = add nsw i32 %tmp85, %tmp88, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_6_7, i32* %tempResult_addr_15, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_16 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_1_0_7, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_1_7 = mul nsw i32 %tempB_load_56, %tempA_load_8, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_1 = mul nsw i32 %tempB_load_57, %tempA_load_9, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_2 = mul nsw i32 %tempB_load_58, %tempA_load_10, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_3 = mul nsw i32 %tempB_load_59, %tempA_load_11, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_4 = mul nsw i32 %tempB_load_60, %tempA_load_12, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_5 = mul nsw i32 %tempB_load_61, %tempA_load_13, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_6 = mul nsw i32 %tempB_load_62, %tempA_load_14, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_1_7_7 = mul nsw i32 %tempB_load_63, %tempA_load_15, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp92 = add i32 %tmp_10_1_7, %tmp_10_1_7_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp93 = add i32 %tmp_10_1_7_3, %tmp_10_1_7_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp91 = add i32 %tmp92, %tmp93, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp95 = add i32 %tmp_10_1_7_5, %tmp_10_1_7_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp96 = add i32 %tmp_10_1_7_7, %tmp_10_1_7_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp94 = add i32 %tmp95, %tmp96, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_1_7_7 = add nsw i32 %tmp91, %tmp94, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_1_7_7, i32* %tempResult_addr_16, align 4, !dbg !46 ; [debug line = 16:5]
  %tmp_2_2 = or i6 %tmp_s, 16, !dbg !57           ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp_6_2 = zext i6 %tmp_2_2 to i64, !dbg !57    ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult_addr_17 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_6_2, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA_addr_17 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_6_2, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_16 = load i32* %tempA_addr_17, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2 = mul nsw i32 %tempB_load, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_s = or i6 %tmp_s, 17, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_1 = zext i6 %tmp_8_2_0_s to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_18 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_1, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_17 = load i32* %tempA_addr_18, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_1 = mul nsw i32 %tempB_load_1, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_1 = or i6 %tmp_s, 18, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_2 = zext i6 %tmp_8_2_0_1 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_19 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_2, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_18 = load i32* %tempA_addr_19, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_2 = mul nsw i32 %tempB_load_2, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_2 = or i6 %tmp_s, 19, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_3 = zext i6 %tmp_8_2_0_2 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_20 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_3, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_19 = load i32* %tempA_addr_20, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_3 = mul nsw i32 %tempB_load_3, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_3 = or i6 %tmp_s, 20, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_4 = zext i6 %tmp_8_2_0_3 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_21 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_4, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_20 = load i32* %tempA_addr_21, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_4 = mul nsw i32 %tempB_load_4, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_4 = or i6 %tmp_s, 21, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_5 = zext i6 %tmp_8_2_0_4 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_22 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_5, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_21 = load i32* %tempA_addr_22, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_5 = mul nsw i32 %tempB_load_5, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_5 = or i6 %tmp_s, 22, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_6 = zext i6 %tmp_8_2_0_5 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_23 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_6, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_22 = load i32* %tempA_addr_23, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_6 = mul nsw i32 %tempB_load_6, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_2_0_6 = or i6 %tmp_s, 23, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_2_0_7 = zext i6 %tmp_8_2_0_6 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_24 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_2_0_7, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_23 = load i32* %tempA_addr_24, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_2_0_7 = mul nsw i32 %tempB_load_7, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp98 = add i32 %tmp_10_2, %tmp_10_2_0_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp99 = add i32 %tmp_10_2_0_3, %tmp_10_2_0_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp97 = add i32 %tmp98, %tmp99, !dbg !46       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp101 = add i32 %tmp_10_2_0_5, %tmp_10_2_0_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp102 = add i32 %tmp_10_2_0_7, %tmp_10_2_0_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp100 = add i32 %tmp101, %tmp102, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_0_7 = add nsw i32 %tmp97, %tmp100, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_0_7, i32* %tempResult_addr_17, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_18 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_1, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_1 = mul nsw i32 %tempB_load_8, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_1 = mul nsw i32 %tempB_load_9, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_2 = mul nsw i32 %tempB_load_10, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_3 = mul nsw i32 %tempB_load_11, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_4 = mul nsw i32 %tempB_load_12, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_5 = mul nsw i32 %tempB_load_13, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_6 = mul nsw i32 %tempB_load_14, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_1_7 = mul nsw i32 %tempB_load_15, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp104 = add i32 %tmp_10_2_1, %tmp_10_2_1_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp105 = add i32 %tmp_10_2_1_3, %tmp_10_2_1_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp103 = add i32 %tmp104, %tmp105, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp107 = add i32 %tmp_10_2_1_5, %tmp_10_2_1_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp108 = add i32 %tmp_10_2_1_7, %tmp_10_2_1_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp106 = add i32 %tmp107, %tmp108, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_1_7 = add nsw i32 %tmp103, %tmp106, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_1_7, i32* %tempResult_addr_18, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_19 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_2, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_2 = mul nsw i32 %tempB_load_16, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_1 = mul nsw i32 %tempB_load_17, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_2 = mul nsw i32 %tempB_load_18, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_3 = mul nsw i32 %tempB_load_19, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_4 = mul nsw i32 %tempB_load_20, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_5 = mul nsw i32 %tempB_load_21, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_6 = mul nsw i32 %tempB_load_22, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_2_7 = mul nsw i32 %tempB_load_23, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp110 = add i32 %tmp_10_2_2, %tmp_10_2_2_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp111 = add i32 %tmp_10_2_2_3, %tmp_10_2_2_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp109 = add i32 %tmp110, %tmp111, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp113 = add i32 %tmp_10_2_2_5, %tmp_10_2_2_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp114 = add i32 %tmp_10_2_2_7, %tmp_10_2_2_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp112 = add i32 %tmp113, %tmp114, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_2_7 = add nsw i32 %tmp109, %tmp112, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_2_7, i32* %tempResult_addr_19, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_20 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_3, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_3 = mul nsw i32 %tempB_load_24, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_1 = mul nsw i32 %tempB_load_25, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_2 = mul nsw i32 %tempB_load_26, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_3 = mul nsw i32 %tempB_load_27, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_4 = mul nsw i32 %tempB_load_28, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_5 = mul nsw i32 %tempB_load_29, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_6 = mul nsw i32 %tempB_load_30, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_3_7 = mul nsw i32 %tempB_load_31, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp116 = add i32 %tmp_10_2_3, %tmp_10_2_3_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp117 = add i32 %tmp_10_2_3_3, %tmp_10_2_3_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp115 = add i32 %tmp116, %tmp117, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp119 = add i32 %tmp_10_2_3_5, %tmp_10_2_3_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp120 = add i32 %tmp_10_2_3_7, %tmp_10_2_3_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp118 = add i32 %tmp119, %tmp120, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_3_7 = add nsw i32 %tmp115, %tmp118, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_3_7, i32* %tempResult_addr_20, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_21 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_4, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_4 = mul nsw i32 %tempB_load_32, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_1 = mul nsw i32 %tempB_load_33, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_2 = mul nsw i32 %tempB_load_34, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_3 = mul nsw i32 %tempB_load_35, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_4 = mul nsw i32 %tempB_load_36, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_5 = mul nsw i32 %tempB_load_37, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_6 = mul nsw i32 %tempB_load_38, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_4_7 = mul nsw i32 %tempB_load_39, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp122 = add i32 %tmp_10_2_4, %tmp_10_2_4_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp123 = add i32 %tmp_10_2_4_3, %tmp_10_2_4_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp121 = add i32 %tmp122, %tmp123, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp125 = add i32 %tmp_10_2_4_5, %tmp_10_2_4_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp126 = add i32 %tmp_10_2_4_7, %tmp_10_2_4_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp124 = add i32 %tmp125, %tmp126, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_4_7 = add nsw i32 %tmp121, %tmp124, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_4_7, i32* %tempResult_addr_21, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_22 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_5, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_5 = mul nsw i32 %tempB_load_40, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_1 = mul nsw i32 %tempB_load_41, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_2 = mul nsw i32 %tempB_load_42, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_3 = mul nsw i32 %tempB_load_43, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_4 = mul nsw i32 %tempB_load_44, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_5 = mul nsw i32 %tempB_load_45, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_6 = mul nsw i32 %tempB_load_46, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_5_7 = mul nsw i32 %tempB_load_47, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp128 = add i32 %tmp_10_2_5, %tmp_10_2_5_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp129 = add i32 %tmp_10_2_5_3, %tmp_10_2_5_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp127 = add i32 %tmp128, %tmp129, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp131 = add i32 %tmp_10_2_5_5, %tmp_10_2_5_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp132 = add i32 %tmp_10_2_5_7, %tmp_10_2_5_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp130 = add i32 %tmp131, %tmp132, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_5_7 = add nsw i32 %tmp127, %tmp130, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_5_7, i32* %tempResult_addr_22, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_23 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_6, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_6 = mul nsw i32 %tempB_load_48, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_1 = mul nsw i32 %tempB_load_49, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_2 = mul nsw i32 %tempB_load_50, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_3 = mul nsw i32 %tempB_load_51, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_4 = mul nsw i32 %tempB_load_52, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_5 = mul nsw i32 %tempB_load_53, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_6 = mul nsw i32 %tempB_load_54, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_6_7 = mul nsw i32 %tempB_load_55, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp134 = add i32 %tmp_10_2_6, %tmp_10_2_6_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp135 = add i32 %tmp_10_2_6_3, %tmp_10_2_6_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp133 = add i32 %tmp134, %tmp135, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp137 = add i32 %tmp_10_2_6_5, %tmp_10_2_6_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp138 = add i32 %tmp_10_2_6_7, %tmp_10_2_6_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp136 = add i32 %tmp137, %tmp138, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_6_7 = add nsw i32 %tmp133, %tmp136, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_6_7, i32* %tempResult_addr_23, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_24 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_2_0_7, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_2_7 = mul nsw i32 %tempB_load_56, %tempA_load_16, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_1 = mul nsw i32 %tempB_load_57, %tempA_load_17, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_2 = mul nsw i32 %tempB_load_58, %tempA_load_18, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_3 = mul nsw i32 %tempB_load_59, %tempA_load_19, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_4 = mul nsw i32 %tempB_load_60, %tempA_load_20, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_5 = mul nsw i32 %tempB_load_61, %tempA_load_21, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_6 = mul nsw i32 %tempB_load_62, %tempA_load_22, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_2_7_7 = mul nsw i32 %tempB_load_63, %tempA_load_23, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp140 = add i32 %tmp_10_2_7, %tmp_10_2_7_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp141 = add i32 %tmp_10_2_7_3, %tmp_10_2_7_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp139 = add i32 %tmp140, %tmp141, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp143 = add i32 %tmp_10_2_7_5, %tmp_10_2_7_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp144 = add i32 %tmp_10_2_7_7, %tmp_10_2_7_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp142 = add i32 %tmp143, %tmp144, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_2_7_7 = add nsw i32 %tmp139, %tmp142, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_2_7_7, i32* %tempResult_addr_24, align 4, !dbg !46 ; [debug line = 16:5]
  %tmp_2_3 = or i6 %tmp_s, 24, !dbg !57           ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp_6_3 = zext i6 %tmp_2_3 to i64, !dbg !57    ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult_addr_25 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_6_3, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA_addr_25 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_6_3, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_24 = load i32* %tempA_addr_25, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3 = mul nsw i32 %tempB_load, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_s = or i6 %tmp_s, 25, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_1 = zext i6 %tmp_8_3_0_s to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_26 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_1, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_25 = load i32* %tempA_addr_26, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_1 = mul nsw i32 %tempB_load_1, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_1 = or i6 %tmp_s, 26, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_2 = zext i6 %tmp_8_3_0_1 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_27 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_2, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_26 = load i32* %tempA_addr_27, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_2 = mul nsw i32 %tempB_load_2, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_2 = or i6 %tmp_s, 27, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_3 = zext i6 %tmp_8_3_0_2 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_28 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_3, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_27 = load i32* %tempA_addr_28, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_3 = mul nsw i32 %tempB_load_3, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_3 = or i6 %tmp_s, 28, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_4 = zext i6 %tmp_8_3_0_3 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_29 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_4, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_28 = load i32* %tempA_addr_29, align 16, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_4 = mul nsw i32 %tempB_load_4, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_4 = or i6 %tmp_s, 29, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_5 = zext i6 %tmp_8_3_0_4 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_30 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_5, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_29 = load i32* %tempA_addr_30, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_5 = mul nsw i32 %tempB_load_5, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_5 = or i6 %tmp_s, 30, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_6 = zext i6 %tmp_8_3_0_5 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_31 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_6, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_30 = load i32* %tempA_addr_31, align 8, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_6 = mul nsw i32 %tempB_load_6, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_8_3_0_6 = or i6 %tmp_s, 31, !dbg !46       ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9_3_0_7 = zext i6 %tmp_8_3_0_6 to i64, !dbg !46 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA_addr_32 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9_3_0_7, !dbg !46 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load_31 = load i32* %tempA_addr_32, align 4, !dbg !46 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp_10_3_0_7 = mul nsw i32 %tempB_load_7, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp146 = add i32 %tmp_10_3, %tmp_10_3_0_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp147 = add i32 %tmp_10_3_0_3, %tmp_10_3_0_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp145 = add i32 %tmp146, %tmp147, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp149 = add i32 %tmp_10_3_0_5, %tmp_10_3_0_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp150 = add i32 %tmp_10_3_0_7, %tmp_10_3_0_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp148 = add i32 %tmp149, %tmp150, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_0_7 = add nsw i32 %tmp145, %tmp148, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_0_7, i32* %tempResult_addr_25, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_26 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_1, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_1 = mul nsw i32 %tempB_load_8, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_1 = mul nsw i32 %tempB_load_9, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_2 = mul nsw i32 %tempB_load_10, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_3 = mul nsw i32 %tempB_load_11, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_4 = mul nsw i32 %tempB_load_12, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_5 = mul nsw i32 %tempB_load_13, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_6 = mul nsw i32 %tempB_load_14, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_1_7 = mul nsw i32 %tempB_load_15, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp152 = add i32 %tmp_10_3_1, %tmp_10_3_1_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp153 = add i32 %tmp_10_3_1_3, %tmp_10_3_1_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp151 = add i32 %tmp152, %tmp153, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp155 = add i32 %tmp_10_3_1_5, %tmp_10_3_1_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp156 = add i32 %tmp_10_3_1_7, %tmp_10_3_1_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp154 = add i32 %tmp155, %tmp156, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_1_7 = add nsw i32 %tmp151, %tmp154, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_1_7, i32* %tempResult_addr_26, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_27 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_2, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_2 = mul nsw i32 %tempB_load_16, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_1 = mul nsw i32 %tempB_load_17, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_2 = mul nsw i32 %tempB_load_18, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_3 = mul nsw i32 %tempB_load_19, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_4 = mul nsw i32 %tempB_load_20, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_5 = mul nsw i32 %tempB_load_21, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_6 = mul nsw i32 %tempB_load_22, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_2_7 = mul nsw i32 %tempB_load_23, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp158 = add i32 %tmp_10_3_2, %tmp_10_3_2_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp159 = add i32 %tmp_10_3_2_3, %tmp_10_3_2_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp157 = add i32 %tmp158, %tmp159, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp161 = add i32 %tmp_10_3_2_5, %tmp_10_3_2_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp162 = add i32 %tmp_10_3_2_7, %tmp_10_3_2_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp160 = add i32 %tmp161, %tmp162, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_2_7 = add nsw i32 %tmp157, %tmp160, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_2_7, i32* %tempResult_addr_27, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_28 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_3, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_3 = mul nsw i32 %tempB_load_24, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_1 = mul nsw i32 %tempB_load_25, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_2 = mul nsw i32 %tempB_load_26, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_3 = mul nsw i32 %tempB_load_27, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_4 = mul nsw i32 %tempB_load_28, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_5 = mul nsw i32 %tempB_load_29, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_6 = mul nsw i32 %tempB_load_30, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_3_7 = mul nsw i32 %tempB_load_31, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp164 = add i32 %tmp_10_3_3, %tmp_10_3_3_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp165 = add i32 %tmp_10_3_3_3, %tmp_10_3_3_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp163 = add i32 %tmp164, %tmp165, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp167 = add i32 %tmp_10_3_3_5, %tmp_10_3_3_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp168 = add i32 %tmp_10_3_3_7, %tmp_10_3_3_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp166 = add i32 %tmp167, %tmp168, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_3_7 = add nsw i32 %tmp163, %tmp166, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_3_7, i32* %tempResult_addr_28, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_29 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_4, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_4 = mul nsw i32 %tempB_load_32, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_1 = mul nsw i32 %tempB_load_33, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_2 = mul nsw i32 %tempB_load_34, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_3 = mul nsw i32 %tempB_load_35, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_4 = mul nsw i32 %tempB_load_36, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_5 = mul nsw i32 %tempB_load_37, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_6 = mul nsw i32 %tempB_load_38, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_4_7 = mul nsw i32 %tempB_load_39, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp170 = add i32 %tmp_10_3_4, %tmp_10_3_4_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp171 = add i32 %tmp_10_3_4_3, %tmp_10_3_4_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp169 = add i32 %tmp170, %tmp171, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp173 = add i32 %tmp_10_3_4_5, %tmp_10_3_4_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp174 = add i32 %tmp_10_3_4_7, %tmp_10_3_4_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp172 = add i32 %tmp173, %tmp174, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_4_7 = add nsw i32 %tmp169, %tmp172, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_4_7, i32* %tempResult_addr_29, align 16, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_30 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_5, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_5 = mul nsw i32 %tempB_load_40, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_1 = mul nsw i32 %tempB_load_41, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_2 = mul nsw i32 %tempB_load_42, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_3 = mul nsw i32 %tempB_load_43, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_4 = mul nsw i32 %tempB_load_44, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_5 = mul nsw i32 %tempB_load_45, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_6 = mul nsw i32 %tempB_load_46, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_5_7 = mul nsw i32 %tempB_load_47, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp176 = add i32 %tmp_10_3_5, %tmp_10_3_5_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp177 = add i32 %tmp_10_3_5_3, %tmp_10_3_5_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp175 = add i32 %tmp176, %tmp177, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp179 = add i32 %tmp_10_3_5_5, %tmp_10_3_5_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp180 = add i32 %tmp_10_3_5_7, %tmp_10_3_5_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp178 = add i32 %tmp179, %tmp180, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_5_7 = add nsw i32 %tmp175, %tmp178, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_5_7, i32* %tempResult_addr_30, align 4, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_31 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_6, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_6 = mul nsw i32 %tempB_load_48, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_1 = mul nsw i32 %tempB_load_49, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_2 = mul nsw i32 %tempB_load_50, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_3 = mul nsw i32 %tempB_load_51, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_4 = mul nsw i32 %tempB_load_52, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_5 = mul nsw i32 %tempB_load_53, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_6 = mul nsw i32 %tempB_load_54, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_6_7 = mul nsw i32 %tempB_load_55, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp182 = add i32 %tmp_10_3_6, %tmp_10_3_6_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp183 = add i32 %tmp_10_3_6_3, %tmp_10_3_6_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp181 = add i32 %tmp182, %tmp183, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp185 = add i32 %tmp_10_3_6_5, %tmp_10_3_6_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp186 = add i32 %tmp_10_3_6_7, %tmp_10_3_6_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp184 = add i32 %tmp185, %tmp186, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_6_7 = add nsw i32 %tmp181, %tmp184, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_6_7, i32* %tempResult_addr_31, align 8, !dbg !46 ; [debug line = 16:5]
  %tempResult_addr_32 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_9_3_0_7, !dbg !57 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp_10_3_7 = mul nsw i32 %tempB_load_56, %tempA_load_24, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_1 = mul nsw i32 %tempB_load_57, %tempA_load_25, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_2 = mul nsw i32 %tempB_load_58, %tempA_load_26, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_3 = mul nsw i32 %tempB_load_59, %tempA_load_27, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_4 = mul nsw i32 %tempB_load_60, %tempA_load_28, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_5 = mul nsw i32 %tempB_load_61, %tempA_load_29, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_6 = mul nsw i32 %tempB_load_62, %tempA_load_30, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10_3_7_7 = mul nsw i32 %tempB_load_63, %tempA_load_31, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp188 = add i32 %tmp_10_3_7, %tmp_10_3_7_1, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp189 = add i32 %tmp_10_3_7_3, %tmp_10_3_7_2, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp187 = add i32 %tmp188, %tmp189, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp191 = add i32 %tmp_10_3_7_5, %tmp_10_3_7_4, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp192 = add i32 %tmp_10_3_7_7, %tmp_10_3_7_6, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp190 = add i32 %tmp191, %tmp192, !dbg !46    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11_3_7_7 = add nsw i32 %tmp187, %tmp190, !dbg !46 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp_11_3_7_7, i32* %tempResult_addr_32, align 4, !dbg !46 ; [debug line = 16:5]
  %i_1_3 = add i4 4, %i, !dbg !59                 ; [#uses=1 type=i4] [debug line = 10:25]
  br label %burst.rd.end6.0, !dbg !59             ; [debug line = 10:25]

burst.wr.header:                                  ; preds = %burst.wr.body, %burst.wr.header.preheader
  %indvar1 = phi i7 [ %indvar_next2, %burst.wr.body ], [ 0, %burst.wr.header.preheader ] ; [#uses=3 type=i7]
  %exitcond5 = icmp eq i7 %indvar1, -64           ; [#uses=1 type=i1]
  %indvar_next2 = add i7 %indvar1, 1              ; [#uses=1 type=i7]
  br i1 %exitcond5, label %memcpy.tail, label %burst.wr.body

burst.wr.body:                                    ; preds = %burst.wr.header
  %empty_8 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstwrite_rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([18 x i8]* @burstwrite_OC_region) nounwind ; [#uses=1 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str9)
  call void (...)* @_ssdm_op_SpecLoopName([29 x i8]* @memcpy_OC_result_OC_s)
  %tmp_3 = zext i7 %indvar1 to i64, !dbg !54      ; [#uses=1 type=i64] [debug line = 18:2]
  %tempResult_addr = getelementptr [64 x i32]* %tempResult, i64 0, i64 %tmp_3, !dbg !54 ; [#uses=1 type=i32*] [debug line = 18:2]
  %tempResult_load = load i32* %tempResult_addr, align 4, !dbg !54 ; [#uses=1 type=i32] [debug line = 18:2]
  call void @_ssdm_op_Write.m_axi.i32P(i32* %gmem_addr, i32 %tempResult_load, i4 -1), !dbg !54 ; [debug line = 18:2]
  %burstwrite_rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([18 x i8]* @burstwrite_OC_region, i32 %burstwrite_rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.wr.header

memcpy.tail:                                      ; preds = %burst.wr.header
  %gmem_addr_wr_resp = call i1 @_ssdm_op_WriteResp.m_axi.i32P(i32* %gmem_addr), !dbg !54 ; [#uses=0 type=i1] [debug line = 18:2]
  ret void, !dbg !60                              ; [debug line = 19:1]
}

; [#uses=1]
declare i32 @llvm.part.select.i32(i32, i32, i32) nounwind readnone

; [#uses=6]
declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

; [#uses=3]
declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone

; [#uses=1]
define weak i1 @_ssdm_op_WriteResp.m_axi.i32P(i32*) {
entry:
  ret i1 true
}

; [#uses=1]
define weak i1 @_ssdm_op_WriteReq.m_axi.i32P(i32*, i32) {
entry:
  ret i1 true
}

; [#uses=1]
define weak void @_ssdm_op_Write.m_axi.i32P(i32*, i32, i4) {
entry:
  ret void
}

; [#uses=1]
define weak void @_ssdm_op_SpecTopModule(...) {
entry:
  ret void
}

; [#uses=4]
define weak i32 @_ssdm_op_SpecRegionEnd(...) {
entry:
  ret i32 0
}

; [#uses=4]
define weak i32 @_ssdm_op_SpecRegionBegin(...) {
entry:
  ret i32 0
}

; [#uses=4]
define weak void @_ssdm_op_SpecPipeline(...) nounwind {
entry:
  ret void
}

; [#uses=4]
define weak i32 @_ssdm_op_SpecLoopTripCount(...) {
entry:
  ret i32 0
}

; [#uses=4]
define weak void @_ssdm_op_SpecLoopName(...) nounwind {
entry:
  ret void
}

; [#uses=5]
define weak void @_ssdm_op_SpecInterface(...) nounwind {
entry:
  ret void
}

; [#uses=1]
define weak void @_ssdm_op_SpecBitsMap(...) {
entry:
  ret void
}

; [#uses=2]
define weak i1 @_ssdm_op_ReadReq.m_axi.i32P(i32*, i32) {
entry:
  ret i1 true
}

; [#uses=3]
define weak i32 @_ssdm_op_Read.s_axilite.i32(i32) {
entry:
  ret i32 %0
}

; [#uses=2]
define weak i32 @_ssdm_op_Read.m_axi.i32P(i32*) {
entry:
  %empty = load i32* %0                           ; [#uses=1 type=i32]
  ret i32 %empty
}

; [#uses=3]
define weak i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32, i32, i32) nounwind readnone {
entry:
  %empty = call i32 @llvm.part.select.i32(i32 %0, i32 %1, i32 %2) ; [#uses=1 type=i32]
  %empty_9 = trunc i32 %empty to i30              ; [#uses=1 type=i30]
  ret i30 %empty_9
}

; [#uses=0]
declare i3 @_ssdm_op_PartSelect.i3.i4.i32.i32(i4, i32, i32) nounwind readnone

; [#uses=1]
define weak i6 @_ssdm_op_BitConcatenate.i6.i3.i3(i3, i3) nounwind readnone {
entry:
  %empty = zext i3 %0 to i6                       ; [#uses=1 type=i6]
  %empty_10 = zext i3 %1 to i6                    ; [#uses=1 type=i6]
  %empty_11 = shl i6 %empty, 3                    ; [#uses=1 type=i6]
  %empty_12 = or i6 %empty_11, %empty_10          ; [#uses=1 type=i6]
  ret i6 %empty_12
}

!opencl.kernels = !{!0}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}
!axi4.master.portmap = !{!7}
!axi4.slave.bundlemap = !{!8, !9, !10}

!0 = metadata !{null, metadata !1, metadata !2, metadata !3, metadata !4, metadata !5, metadata !6}
!1 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1, i32 1}
!2 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none"}
!3 = metadata !{metadata !"kernel_arg_type", metadata !"int*", metadata !"int*", metadata !"int*"}
!4 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !""}
!5 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B", metadata !"result"}
!6 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!7 = metadata !{metadata !"gmem", metadata !"A", metadata !"READONLY", metadata !"B", metadata !"READONLY", metadata !"result", metadata !"WRITEONLY"}
!8 = metadata !{metadata !"A", metadata !""}
!9 = metadata !{metadata !"B", metadata !""}
!10 = metadata !{metadata !"result", metadata !""}
!11 = metadata !{i32 786689, metadata !12, metadata !"result", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!12 = metadata !{i32 786478, i32 0, metadata !13, metadata !"matrix_mult", metadata !"matrix_mult", metadata !"_Z11matrix_multPiS_S_", metadata !13, i32 4, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !18, i32 4} ; [ DW_TAG_subprogram ]
!13 = metadata !{i32 786473, metadata !"matrix_mult/matrix_mult.cpp", metadata !"/home/hakta/Documents", null} ; [ DW_TAG_file_type ]
!14 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
!15 = metadata !{null, metadata !16, metadata !16, metadata !16}
!16 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !17} ; [ DW_TAG_pointer_type ]
!17 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
!18 = metadata !{metadata !19}
!19 = metadata !{i32 786468}                      ; [ DW_TAG_base_type ]
!20 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 2048, i64 32, i32 0, i32 0, metadata !17, metadata !21, i32 0, i32 0} ; [ DW_TAG_array_type ]
!21 = metadata !{metadata !22}
!22 = metadata !{i32 786465, i64 0, i64 63}       ; [ DW_TAG_subrange_type ]
!23 = metadata !{i32 4, i32 46, metadata !12, null}
!24 = metadata !{i32 786689, metadata !12, metadata !"B", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!25 = metadata !{i32 4, i32 34, metadata !12, null}
!26 = metadata !{i32 786689, metadata !12, metadata !"A", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!27 = metadata !{i32 4, i32 22, metadata !12, null}
!28 = metadata !{metadata !29}
!29 = metadata !{i32 0, i32 31, metadata !30}
!30 = metadata !{metadata !31, metadata !34, metadata !35}
!31 = metadata !{metadata !"A", metadata !32, metadata !"int", i32 0, i32 31}
!32 = metadata !{metadata !33}
!33 = metadata !{i32 0, i32 63, i32 1}
!34 = metadata !{metadata !"B", metadata !32, metadata !"int", i32 0, i32 31}
!35 = metadata !{metadata !"result", metadata !32, metadata !"int", i32 0, i32 31}
!36 = metadata !{i32 5, i32 1, metadata !37, null}
!37 = metadata !{i32 786443, metadata !12, i32 4, i32 59, metadata !13, i32 0} ; [ DW_TAG_lexical_block ]
!38 = metadata !{i32 786688, metadata !37, metadata !"tempA", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!39 = metadata !{i32 5, i32 6, metadata !37, null}
!40 = metadata !{i32 786688, metadata !37, metadata !"tempB", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!41 = metadata !{i32 5, i32 18, metadata !37, null}
!42 = metadata !{i32 786688, metadata !37, metadata !"tempResult", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!43 = metadata !{i32 5, i32 30, metadata !37, null}
!44 = metadata !{i32 6, i32 2, metadata !37, null}
!45 = metadata !{i32 7, i32 2, metadata !37, null}
!46 = metadata !{i32 16, i32 5, metadata !47, null}
!47 = metadata !{i32 786443, metadata !48, i32 16, i32 5, metadata !13, i32 6} ; [ DW_TAG_lexical_block ]
!48 = metadata !{i32 786443, metadata !49, i32 15, i32 4, metadata !13, i32 5} ; [ DW_TAG_lexical_block ]
!49 = metadata !{i32 786443, metadata !50, i32 12, i32 31, metadata !13, i32 4} ; [ DW_TAG_lexical_block ]
!50 = metadata !{i32 786443, metadata !51, i32 12, i32 3, metadata !13, i32 3} ; [ DW_TAG_lexical_block ]
!51 = metadata !{i32 786443, metadata !52, i32 12, i32 1, metadata !13, i32 2} ; [ DW_TAG_lexical_block ]
!52 = metadata !{i32 786443, metadata !37, i32 10, i32 2, metadata !13, i32 1} ; [ DW_TAG_lexical_block ]
!53 = metadata !{i32 10, i32 16, metadata !52, null}
!54 = metadata !{i32 18, i32 2, metadata !37, null}
!55 = metadata !{i32 12, i32 2, metadata !51, null}
!56 = metadata !{i32 12, i32 1, metadata !51, null}
!57 = metadata !{i32 13, i32 4, metadata !49, null}
!58 = metadata !{i32 16, i32 61, metadata !50, null}
!59 = metadata !{i32 10, i32 25, metadata !52, null}
!60 = metadata !{i32 19, i32 1, metadata !37, null}