; ModuleID = '/home/hakta/Documents/matrix_mult/solution2/.autopilot/db/a.o.2.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@memcpy_OC_tempB_OC_B.str = internal unnamed_addr constant [15 x i8] c"memcpy.tempB.B\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_tempA_OC_A.str = internal unnamed_addr constant [15 x i8] c"memcpy.tempA.A\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_result_OC_tempResult_OC_gep.str = internal unnamed_addr constant [29 x i8] c"memcpy.result.tempResult.gep\00" ; [#uses=1 type=[29 x i8]*]
@matrix_mult.str = internal unnamed_addr constant [12 x i8] c"matrix_mult\00" ; [#uses=1 type=[12 x i8]*]
@burstwrite_OC_region.str = internal unnamed_addr constant [18 x i8] c"burstwrite.region\00" ; [#uses=2 type=[18 x i8]*]
@burstread_OC_region.str = internal unnamed_addr constant [17 x i8] c"burstread.region\00" ; [#uses=4 type=[17 x i8]*]
@.str9 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@.str8 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@.str7 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@.str4 = private unnamed_addr constant [24 x i8] c"matrix_mult__outer_loop\00", align 1 ; [#uses=3 type=[24 x i8]*]
@.str3 = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1 ; [#uses=1 type=[10 x i8]*]
@.str2 = private unnamed_addr constant [6 x i8] c"slave\00", align 1 ; [#uses=3 type=[6 x i8]*]
@.str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 ; [#uses=22 type=[1 x i8]*]
@.str = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1 ; [#uses=3 type=[6 x i8]*]

; [#uses=0]
define void @matrix_mult([64 x i32]* %A, [64 x i32]* %B, [64 x i32]* %result) nounwind uwtable {
  call void (...)* @_ssdm_op_SpecBitsMap([64 x i32]* %A) nounwind, !map !20
  call void (...)* @_ssdm_op_SpecBitsMap([64 x i32]* %B) nounwind, !map !26
  call void (...)* @_ssdm_op_SpecBitsMap([64 x i32]* %result) nounwind, !map !30
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @matrix_mult.str) nounwind
  %tempA = alloca [64 x i32], align 16            ; [#uses=33 type=[64 x i32]*]
  %tempB = alloca [64 x i32], align 16            ; [#uses=65 type=[64 x i32]*]
  %tempResult = alloca [64 x i32], align 16       ; [#uses=33 type=[64 x i32]*]
  call void @llvm.dbg.value(metadata !{[64 x i32]* %A}, i64 0, metadata !34), !dbg !38 ; [debug line = 4:22] [debug variable = A]
  call void @llvm.dbg.value(metadata !{[64 x i32]* %B}, i64 0, metadata !39), !dbg !40 ; [debug line = 4:34] [debug variable = B]
  call void @llvm.dbg.value(metadata !{[64 x i32]* %result}, i64 0, metadata !41), !dbg !42 ; [debug line = 4:46] [debug variable = result]
  call void (...)* @_ssdm_op_SpecInterface([64 x i32]* %result, [6 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str2, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind
  call void (...)* @_ssdm_op_SpecInterface([64 x i32]* %B, [6 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str2, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind
  call void (...)* @_ssdm_op_SpecInterface([64 x i32]* %A, [6 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str2, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @.str3, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 0, [1 x i8]* @.str1, [1 x i8]* @.str1, [1 x i8]* @.str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind, !dbg !43 ; [debug line = 5:1]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempA}, metadata !45), !dbg !46 ; [debug line = 5:6] [debug variable = tempA]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempB}, metadata !47), !dbg !48 ; [debug line = 5:18] [debug variable = tempB]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempResult}, metadata !49), !dbg !50 ; [debug line = 5:30] [debug variable = tempResult]
  br label %burst.rd.header

burst.rd.header:                                  ; preds = %burst.rd.body, %0
  %indvar = phi i7 [ 0, %0 ], [ %indvar.next, %burst.rd.body ] ; [#uses=3 type=i7]
  %exitcond3 = icmp eq i7 %indvar, -64            ; [#uses=1 type=i1]
  %1 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  br i1 %exitcond3, label %burst.rd.header7.preheader, label %burst.rd.body

burst.rd.header7.preheader:                       ; preds = %burst.rd.header
  br label %burst.rd.header7

burst.rd.body:                                    ; preds = %burst.rd.header
  %burstread.rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region.str) nounwind ; [#uses=1 type=i32]
  %2 = call i32 (...)* @_ssdm_op_SpecBurst([64 x i32]* %A, i32 1, i32 64, i32 1) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str7)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempA_OC_A.str)
  %indvar.next = add i7 %indvar, 1                ; [#uses=1 type=i7]
  %tmp = zext i7 %indvar to i64, !dbg !51         ; [#uses=2 type=i64] [debug line = 6:2]
  %A.addr = getelementptr [64 x i32]* %A, i64 0, i64 %tmp, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2]
  %A.load = load i32* %A.addr, align 4, !dbg !51  ; [#uses=1 type=i32] [debug line = 6:2]
  %tempA.addr = getelementptr [64 x i32]* %tempA, i64 0, i64 %tmp, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2]
  store i32 %A.load, i32* %tempA.addr, align 4, !dbg !51 ; [debug line = 6:2]
  %burstread.rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region.str, i32 %burstread.rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header

burst.rd.header7:                                 ; preds = %burst.rd.body8, %burst.rd.header7.preheader
  %indvar9 = phi i7 [ %indvar.next1, %burst.rd.body8 ], [ 0, %burst.rd.header7.preheader ] ; [#uses=3 type=i7]
  %exitcond4 = icmp eq i7 %indvar9, -64           ; [#uses=1 type=i1]
  %3 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  br i1 %exitcond4, label %burst.rd.end6.0.preheader, label %burst.rd.body8

burst.rd.end6.0.preheader:                        ; preds = %burst.rd.header7
  %tempB.addr.1 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 0, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load = load i32* %tempB.addr.1, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.2 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 8, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.1 = load i32* %tempB.addr.2, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.3 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 16, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.2 = load i32* %tempB.addr.3, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.4 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 24, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.3 = load i32* %tempB.addr.4, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.5 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 32, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.4 = load i32* %tempB.addr.5, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.6 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 40, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.5 = load i32* %tempB.addr.6, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.7 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 48, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.6 = load i32* %tempB.addr.7, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.8 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 56, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.7 = load i32* %tempB.addr.8, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.9 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.8 = load i32* %tempB.addr.9, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.10 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 9, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.9 = load i32* %tempB.addr.10, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.11 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 17, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.10 = load i32* %tempB.addr.11, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.12 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 25, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.11 = load i32* %tempB.addr.12, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.13 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 33, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.12 = load i32* %tempB.addr.13, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.14 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 41, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.13 = load i32* %tempB.addr.14, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.15 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 49, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.14 = load i32* %tempB.addr.15, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.16 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 57, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.15 = load i32* %tempB.addr.16, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.17 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 2, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.16 = load i32* %tempB.addr.17, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.18 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 10, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.17 = load i32* %tempB.addr.18, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.19 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 18, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.18 = load i32* %tempB.addr.19, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.20 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 26, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.19 = load i32* %tempB.addr.20, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.21 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 34, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.20 = load i32* %tempB.addr.21, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.22 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 42, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.21 = load i32* %tempB.addr.22, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.23 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 50, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.22 = load i32* %tempB.addr.23, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.24 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 58, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.23 = load i32* %tempB.addr.24, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.25 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.24 = load i32* %tempB.addr.25, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.26 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 11, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.25 = load i32* %tempB.addr.26, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.27 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 19, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.26 = load i32* %tempB.addr.27, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.28 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 27, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.27 = load i32* %tempB.addr.28, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.29 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 35, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.28 = load i32* %tempB.addr.29, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.30 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 43, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.29 = load i32* %tempB.addr.30, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.31 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 51, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.30 = load i32* %tempB.addr.31, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.32 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 59, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.31 = load i32* %tempB.addr.32, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.33 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 4, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.32 = load i32* %tempB.addr.33, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.34 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 12, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.33 = load i32* %tempB.addr.34, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.35 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 20, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.34 = load i32* %tempB.addr.35, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.36 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 28, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.35 = load i32* %tempB.addr.36, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.37 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 36, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.36 = load i32* %tempB.addr.37, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.38 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 44, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.37 = load i32* %tempB.addr.38, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.39 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 52, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.38 = load i32* %tempB.addr.39, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.40 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 60, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.39 = load i32* %tempB.addr.40, align 16, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.41 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 5, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.40 = load i32* %tempB.addr.41, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.42 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 13, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.41 = load i32* %tempB.addr.42, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.43 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 21, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.42 = load i32* %tempB.addr.43, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.44 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 29, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.43 = load i32* %tempB.addr.44, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.45 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 37, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.44 = load i32* %tempB.addr.45, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.46 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 45, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.45 = load i32* %tempB.addr.46, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.47 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 53, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.46 = load i32* %tempB.addr.47, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.48 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 61, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.47 = load i32* %tempB.addr.48, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.49 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.48 = load i32* %tempB.addr.49, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.50 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 14, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.49 = load i32* %tempB.addr.50, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.51 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 22, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.50 = load i32* %tempB.addr.51, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.52 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 30, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.51 = load i32* %tempB.addr.52, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.53 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 38, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.52 = load i32* %tempB.addr.53, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.54 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 46, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.53 = load i32* %tempB.addr.54, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.55 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 54, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.54 = load i32* %tempB.addr.55, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.56 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 62, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.55 = load i32* %tempB.addr.56, align 8, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.57 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 7, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.56 = load i32* %tempB.addr.57, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.58 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 15, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.57 = load i32* %tempB.addr.58, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.59 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 23, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.58 = load i32* %tempB.addr.59, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.60 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 31, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.59 = load i32* %tempB.addr.60, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.61 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 39, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.60 = load i32* %tempB.addr.61, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.62 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 47, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.61 = load i32* %tempB.addr.62, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.63 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 55, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.62 = load i32* %tempB.addr.63, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  %tempB.addr.64 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 63, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB.load.63 = load i32* %tempB.addr.64, align 4, !dbg !52 ; [#uses=4 type=i32] [debug line = 16:5]
  br label %burst.rd.end6.0

burst.rd.body8:                                   ; preds = %burst.rd.header7
  %burstread.rbegin1 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region.str) nounwind ; [#uses=1 type=i32]
  %4 = call i32 (...)* @_ssdm_op_SpecBurst([64 x i32]* %B, i32 1, i32 64, i32 1) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str8)
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempB_OC_B.str)
  %indvar.next1 = add i7 %indvar9, 1              ; [#uses=1 type=i7]
  %tmp.1 = zext i7 %indvar9 to i64, !dbg !59      ; [#uses=2 type=i64] [debug line = 7:2]
  %B.addr = getelementptr [64 x i32]* %B, i64 0, i64 %tmp.1, !dbg !59 ; [#uses=1 type=i32*] [debug line = 7:2]
  %B.load = load i32* %B.addr, align 4, !dbg !59  ; [#uses=1 type=i32] [debug line = 7:2]
  %tempB.addr = getelementptr [64 x i32]* %tempB, i64 0, i64 %tmp.1, !dbg !59 ; [#uses=1 type=i32*] [debug line = 7:2]
  store i32 %B.load, i32* %tempB.addr, align 4, !dbg !59 ; [debug line = 7:2]
  %burstread.rend14 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region.str, i32 %burstread.rbegin1) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header7

burst.rd.end6.0:                                  ; preds = %burst.rd.end6.1, %burst.rd.end6.0.preheader
  %i = phi i4 [ %i.1.3, %burst.rd.end6.1 ], [ 0, %burst.rd.end6.0.preheader ] ; [#uses=3 type=i4]
  %i.cast = zext i4 %i to i6                      ; [#uses=1 type=i6]
  %5 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 2, i64 2, i64 2) nounwind ; [#uses=0 type=i32]
  %exitcond2 = icmp eq i4 %i, -8, !dbg !60        ; [#uses=1 type=i1] [debug line = 10:16]
  br i1 %exitcond2, label %burst.wr.header.preheader, label %burst.rd.end6.1, !dbg !60 ; [debug line = 10:16]

burst.wr.header.preheader:                        ; preds = %burst.rd.end6.0
  br label %burst.wr.header

burst.rd.end6.1:                                  ; preds = %burst.rd.end6.0
  call void (...)* @_ssdm_op_SpecLoopName([24 x i8]* @.str4) nounwind, !dbg !61 ; [debug line = 12:2]
  %tmp.2 = call i32 (...)* @_ssdm_op_SpecRegionBegin([24 x i8]* @.str4) nounwind, !dbg !61 ; [#uses=1 type=i32] [debug line = 12:2]
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @.str1) nounwind, !dbg !62 ; [debug line = 12:1]
  %tmp. = shl i6 %i.cast, 3, !dbg !63             ; [#uses=32 type=i6] [debug line = 13:4]
  %tmp.6 = zext i6 %tmp. to i64, !dbg !63         ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult.addr.1 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.6, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA.addr.1 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load = load i32* %tempA.addr.1, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10 = mul nsw i32 %tempB.load, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0. = or i6 %tmp., 1, !dbg !52          ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.1 = zext i6 %tmp.8.0.0. to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.2 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.1 = load i32* %tempA.addr.2, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.1 = mul nsw i32 %tempB.load.1, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0.1 = or i6 %tmp., 2, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.2 = zext i6 %tmp.8.0.0.1 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.3 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.2, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.2 = load i32* %tempA.addr.3, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.2 = mul nsw i32 %tempB.load.2, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0.2 = or i6 %tmp., 3, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.3 = zext i6 %tmp.8.0.0.2 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.4 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.3 = load i32* %tempA.addr.4, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.3 = mul nsw i32 %tempB.load.3, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0.3 = or i6 %tmp., 4, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.4 = zext i6 %tmp.8.0.0.3 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.5 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.4, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.4 = load i32* %tempA.addr.5, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.4 = mul nsw i32 %tempB.load.4, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0.4 = or i6 %tmp., 5, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.5 = zext i6 %tmp.8.0.0.4 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.6 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.5, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.5 = load i32* %tempA.addr.6, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.5 = mul nsw i32 %tempB.load.5, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0.5 = or i6 %tmp., 6, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.6 = zext i6 %tmp.8.0.0.5 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.7 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.6 = load i32* %tempA.addr.7, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.6 = mul nsw i32 %tempB.load.6, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.0.0.6 = or i6 %tmp., 7, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.0.0.7 = zext i6 %tmp.8.0.0.6 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.8 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.0.0.7, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.7 = load i32* %tempA.addr.8, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.0.0.7 = mul nsw i32 %tempB.load.7, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp2 = add i32 %tmp.10, %tmp.10.0.0.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp3 = add i32 %tmp.10.0.0.3, %tmp.10.0.0.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp1 = add i32 %tmp2, %tmp3, !dbg !52          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp5 = add i32 %tmp.10.0.0.5, %tmp.10.0.0.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp6 = add i32 %tmp.10.0.0.7, %tmp.10.0.0.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp4 = add i32 %tmp5, %tmp6, !dbg !52          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.0.7 = add nsw i32 %tmp1, %tmp4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.0.7, i32* %tempResult.addr.1, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.2 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.1, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.1 = mul nsw i32 %tempB.load.8, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.1 = mul nsw i32 %tempB.load.9, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.2 = mul nsw i32 %tempB.load.10, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.3 = mul nsw i32 %tempB.load.11, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.4 = mul nsw i32 %tempB.load.12, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.5 = mul nsw i32 %tempB.load.13, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.6 = mul nsw i32 %tempB.load.14, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.1.7 = mul nsw i32 %tempB.load.15, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp8 = add i32 %tmp.10.0.1, %tmp.10.0.1.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp9 = add i32 %tmp.10.0.1.3, %tmp.10.0.1.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp7 = add i32 %tmp8, %tmp9, !dbg !52          ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp11 = add i32 %tmp.10.0.1.5, %tmp.10.0.1.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp12 = add i32 %tmp.10.0.1.7, %tmp.10.0.1.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp10 = add i32 %tmp11, %tmp12, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.1.7 = add nsw i32 %tmp7, %tmp10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.1.7, i32* %tempResult.addr.2, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.3 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.2, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.2 = mul nsw i32 %tempB.load.16, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.1 = mul nsw i32 %tempB.load.17, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.2 = mul nsw i32 %tempB.load.18, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.3 = mul nsw i32 %tempB.load.19, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.4 = mul nsw i32 %tempB.load.20, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.5 = mul nsw i32 %tempB.load.21, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.6 = mul nsw i32 %tempB.load.22, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.2.7 = mul nsw i32 %tempB.load.23, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp14 = add i32 %tmp.10.0.2, %tmp.10.0.2.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp15 = add i32 %tmp.10.0.2.3, %tmp.10.0.2.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp13 = add i32 %tmp14, %tmp15, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp17 = add i32 %tmp.10.0.2.5, %tmp.10.0.2.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp18 = add i32 %tmp.10.0.2.7, %tmp.10.0.2.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp16 = add i32 %tmp17, %tmp18, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.2.7 = add nsw i32 %tmp13, %tmp16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.2.7, i32* %tempResult.addr.3, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.4 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.3, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.3 = mul nsw i32 %tempB.load.24, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.1 = mul nsw i32 %tempB.load.25, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.2 = mul nsw i32 %tempB.load.26, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.3 = mul nsw i32 %tempB.load.27, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.4 = mul nsw i32 %tempB.load.28, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.5 = mul nsw i32 %tempB.load.29, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.6 = mul nsw i32 %tempB.load.30, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.3.7 = mul nsw i32 %tempB.load.31, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp20 = add i32 %tmp.10.0.3, %tmp.10.0.3.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp21 = add i32 %tmp.10.0.3.3, %tmp.10.0.3.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp19 = add i32 %tmp20, %tmp21, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp23 = add i32 %tmp.10.0.3.5, %tmp.10.0.3.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp24 = add i32 %tmp.10.0.3.7, %tmp.10.0.3.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp22 = add i32 %tmp23, %tmp24, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.3.7 = add nsw i32 %tmp19, %tmp22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.3.7, i32* %tempResult.addr.4, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.5 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.4, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.4 = mul nsw i32 %tempB.load.32, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.1 = mul nsw i32 %tempB.load.33, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.2 = mul nsw i32 %tempB.load.34, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.3 = mul nsw i32 %tempB.load.35, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.4 = mul nsw i32 %tempB.load.36, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.5 = mul nsw i32 %tempB.load.37, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.6 = mul nsw i32 %tempB.load.38, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.4.7 = mul nsw i32 %tempB.load.39, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp26 = add i32 %tmp.10.0.4, %tmp.10.0.4.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp27 = add i32 %tmp.10.0.4.3, %tmp.10.0.4.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp25 = add i32 %tmp26, %tmp27, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp29 = add i32 %tmp.10.0.4.5, %tmp.10.0.4.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp30 = add i32 %tmp.10.0.4.7, %tmp.10.0.4.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp28 = add i32 %tmp29, %tmp30, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.4.7 = add nsw i32 %tmp25, %tmp28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.4.7, i32* %tempResult.addr.5, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.6 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.5, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.5 = mul nsw i32 %tempB.load.40, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.1 = mul nsw i32 %tempB.load.41, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.2 = mul nsw i32 %tempB.load.42, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.3 = mul nsw i32 %tempB.load.43, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.4 = mul nsw i32 %tempB.load.44, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.5 = mul nsw i32 %tempB.load.45, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.6 = mul nsw i32 %tempB.load.46, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.5.7 = mul nsw i32 %tempB.load.47, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp32 = add i32 %tmp.10.0.5, %tmp.10.0.5.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp33 = add i32 %tmp.10.0.5.3, %tmp.10.0.5.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp31 = add i32 %tmp32, %tmp33, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp35 = add i32 %tmp.10.0.5.5, %tmp.10.0.5.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp36 = add i32 %tmp.10.0.5.7, %tmp.10.0.5.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp34 = add i32 %tmp35, %tmp36, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.5.7 = add nsw i32 %tmp31, %tmp34, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.5.7, i32* %tempResult.addr.6, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.7 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.6, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.6 = mul nsw i32 %tempB.load.48, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.1 = mul nsw i32 %tempB.load.49, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.2 = mul nsw i32 %tempB.load.50, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.3 = mul nsw i32 %tempB.load.51, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.4 = mul nsw i32 %tempB.load.52, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.5 = mul nsw i32 %tempB.load.53, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.6 = mul nsw i32 %tempB.load.54, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.6.7 = mul nsw i32 %tempB.load.55, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp38 = add i32 %tmp.10.0.6, %tmp.10.0.6.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp39 = add i32 %tmp.10.0.6.3, %tmp.10.0.6.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp37 = add i32 %tmp38, %tmp39, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp41 = add i32 %tmp.10.0.6.5, %tmp.10.0.6.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp42 = add i32 %tmp.10.0.6.7, %tmp.10.0.6.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp40 = add i32 %tmp41, %tmp42, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.6.7 = add nsw i32 %tmp37, %tmp40, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.6.7, i32* %tempResult.addr.7, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.8 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.0.0.7, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.0.7 = mul nsw i32 %tempB.load.56, %tempA.load, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.1 = mul nsw i32 %tempB.load.57, %tempA.load.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.2 = mul nsw i32 %tempB.load.58, %tempA.load.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.3 = mul nsw i32 %tempB.load.59, %tempA.load.3, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.4 = mul nsw i32 %tempB.load.60, %tempA.load.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.5 = mul nsw i32 %tempB.load.61, %tempA.load.5, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.6 = mul nsw i32 %tempB.load.62, %tempA.load.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.0.7.7 = mul nsw i32 %tempB.load.63, %tempA.load.7, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp44 = add i32 %tmp.10.0.7, %tmp.10.0.7.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp45 = add i32 %tmp.10.0.7.3, %tmp.10.0.7.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp43 = add i32 %tmp44, %tmp45, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp47 = add i32 %tmp.10.0.7.5, %tmp.10.0.7.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp48 = add i32 %tmp.10.0.7.7, %tmp.10.0.7.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp46 = add i32 %tmp47, %tmp48, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.0.7.7 = add nsw i32 %tmp43, %tmp46, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.0.7.7, i32* %tempResult.addr.8, align 4, !dbg !52 ; [debug line = 16:5]
  %6 = call i32 (...)* @_ssdm_op_SpecRegionEnd([24 x i8]* @.str4, i32 %tmp.2) nounwind, !dbg !64 ; [#uses=0 type=i32] [debug line = 16:61]
  %tmp.2.1 = or i6 %tmp., 8, !dbg !63             ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp.6.1 = zext i6 %tmp.2.1 to i64, !dbg !63    ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult.addr.9 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.6.1, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA.addr.9 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.6.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.8 = load i32* %tempA.addr.9, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1 = mul nsw i32 %tempB.load, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0. = or i6 %tmp., 9, !dbg !52          ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.1 = zext i6 %tmp.8.1.0. to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.10 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.9 = load i32* %tempA.addr.10, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.1 = mul nsw i32 %tempB.load.1, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0.1 = or i6 %tmp., 10, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.2 = zext i6 %tmp.8.1.0.1 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.11 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.2, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.10 = load i32* %tempA.addr.11, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.2 = mul nsw i32 %tempB.load.2, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0.2 = or i6 %tmp., 11, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.3 = zext i6 %tmp.8.1.0.2 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.12 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.11 = load i32* %tempA.addr.12, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.3 = mul nsw i32 %tempB.load.3, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0.3 = or i6 %tmp., 12, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.4 = zext i6 %tmp.8.1.0.3 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.13 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.4, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.12 = load i32* %tempA.addr.13, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.4 = mul nsw i32 %tempB.load.4, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0.4 = or i6 %tmp., 13, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.5 = zext i6 %tmp.8.1.0.4 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.14 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.5, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.13 = load i32* %tempA.addr.14, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.5 = mul nsw i32 %tempB.load.5, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0.5 = or i6 %tmp., 14, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.6 = zext i6 %tmp.8.1.0.5 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.15 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.14 = load i32* %tempA.addr.15, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.6 = mul nsw i32 %tempB.load.6, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.1.0.6 = or i6 %tmp., 15, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.1.0.7 = zext i6 %tmp.8.1.0.6 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.16 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.1.0.7, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.15 = load i32* %tempA.addr.16, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.1.0.7 = mul nsw i32 %tempB.load.7, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp50 = add i32 %tmp.10.1, %tmp.10.1.0.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp51 = add i32 %tmp.10.1.0.3, %tmp.10.1.0.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp49 = add i32 %tmp50, %tmp51, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp53 = add i32 %tmp.10.1.0.5, %tmp.10.1.0.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp54 = add i32 %tmp.10.1.0.7, %tmp.10.1.0.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp52 = add i32 %tmp53, %tmp54, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.0.7 = add nsw i32 %tmp49, %tmp52, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.0.7, i32* %tempResult.addr.9, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.10 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.1, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.1 = mul nsw i32 %tempB.load.8, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.1 = mul nsw i32 %tempB.load.9, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.2 = mul nsw i32 %tempB.load.10, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.3 = mul nsw i32 %tempB.load.11, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.4 = mul nsw i32 %tempB.load.12, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.5 = mul nsw i32 %tempB.load.13, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.6 = mul nsw i32 %tempB.load.14, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.1.7 = mul nsw i32 %tempB.load.15, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp56 = add i32 %tmp.10.1.1, %tmp.10.1.1.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp57 = add i32 %tmp.10.1.1.3, %tmp.10.1.1.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp55 = add i32 %tmp56, %tmp57, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp59 = add i32 %tmp.10.1.1.5, %tmp.10.1.1.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp60 = add i32 %tmp.10.1.1.7, %tmp.10.1.1.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp58 = add i32 %tmp59, %tmp60, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.1.7 = add nsw i32 %tmp55, %tmp58, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.1.7, i32* %tempResult.addr.10, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.11 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.2, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.2 = mul nsw i32 %tempB.load.16, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.1 = mul nsw i32 %tempB.load.17, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.2 = mul nsw i32 %tempB.load.18, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.3 = mul nsw i32 %tempB.load.19, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.4 = mul nsw i32 %tempB.load.20, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.5 = mul nsw i32 %tempB.load.21, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.6 = mul nsw i32 %tempB.load.22, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.2.7 = mul nsw i32 %tempB.load.23, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp62 = add i32 %tmp.10.1.2, %tmp.10.1.2.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp63 = add i32 %tmp.10.1.2.3, %tmp.10.1.2.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp61 = add i32 %tmp62, %tmp63, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp65 = add i32 %tmp.10.1.2.5, %tmp.10.1.2.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp66 = add i32 %tmp.10.1.2.7, %tmp.10.1.2.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp64 = add i32 %tmp65, %tmp66, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.2.7 = add nsw i32 %tmp61, %tmp64, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.2.7, i32* %tempResult.addr.11, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.12 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.3, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.3 = mul nsw i32 %tempB.load.24, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.1 = mul nsw i32 %tempB.load.25, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.2 = mul nsw i32 %tempB.load.26, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.3 = mul nsw i32 %tempB.load.27, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.4 = mul nsw i32 %tempB.load.28, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.5 = mul nsw i32 %tempB.load.29, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.6 = mul nsw i32 %tempB.load.30, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.3.7 = mul nsw i32 %tempB.load.31, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp68 = add i32 %tmp.10.1.3, %tmp.10.1.3.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp69 = add i32 %tmp.10.1.3.3, %tmp.10.1.3.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp67 = add i32 %tmp68, %tmp69, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp71 = add i32 %tmp.10.1.3.5, %tmp.10.1.3.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp72 = add i32 %tmp.10.1.3.7, %tmp.10.1.3.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp70 = add i32 %tmp71, %tmp72, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.3.7 = add nsw i32 %tmp67, %tmp70, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.3.7, i32* %tempResult.addr.12, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.13 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.4, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.4 = mul nsw i32 %tempB.load.32, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.1 = mul nsw i32 %tempB.load.33, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.2 = mul nsw i32 %tempB.load.34, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.3 = mul nsw i32 %tempB.load.35, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.4 = mul nsw i32 %tempB.load.36, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.5 = mul nsw i32 %tempB.load.37, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.6 = mul nsw i32 %tempB.load.38, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.4.7 = mul nsw i32 %tempB.load.39, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp74 = add i32 %tmp.10.1.4, %tmp.10.1.4.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp75 = add i32 %tmp.10.1.4.3, %tmp.10.1.4.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp73 = add i32 %tmp74, %tmp75, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp77 = add i32 %tmp.10.1.4.5, %tmp.10.1.4.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp78 = add i32 %tmp.10.1.4.7, %tmp.10.1.4.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp76 = add i32 %tmp77, %tmp78, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.4.7 = add nsw i32 %tmp73, %tmp76, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.4.7, i32* %tempResult.addr.13, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.14 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.5, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.5 = mul nsw i32 %tempB.load.40, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.1 = mul nsw i32 %tempB.load.41, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.2 = mul nsw i32 %tempB.load.42, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.3 = mul nsw i32 %tempB.load.43, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.4 = mul nsw i32 %tempB.load.44, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.5 = mul nsw i32 %tempB.load.45, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.6 = mul nsw i32 %tempB.load.46, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.5.7 = mul nsw i32 %tempB.load.47, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp80 = add i32 %tmp.10.1.5, %tmp.10.1.5.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp81 = add i32 %tmp.10.1.5.3, %tmp.10.1.5.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp79 = add i32 %tmp80, %tmp81, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp83 = add i32 %tmp.10.1.5.5, %tmp.10.1.5.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp84 = add i32 %tmp.10.1.5.7, %tmp.10.1.5.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp82 = add i32 %tmp83, %tmp84, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.5.7 = add nsw i32 %tmp79, %tmp82, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.5.7, i32* %tempResult.addr.14, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.15 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.6, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.6 = mul nsw i32 %tempB.load.48, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.1 = mul nsw i32 %tempB.load.49, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.2 = mul nsw i32 %tempB.load.50, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.3 = mul nsw i32 %tempB.load.51, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.4 = mul nsw i32 %tempB.load.52, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.5 = mul nsw i32 %tempB.load.53, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.6 = mul nsw i32 %tempB.load.54, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.6.7 = mul nsw i32 %tempB.load.55, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp86 = add i32 %tmp.10.1.6, %tmp.10.1.6.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp87 = add i32 %tmp.10.1.6.3, %tmp.10.1.6.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp85 = add i32 %tmp86, %tmp87, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp89 = add i32 %tmp.10.1.6.5, %tmp.10.1.6.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp90 = add i32 %tmp.10.1.6.7, %tmp.10.1.6.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp88 = add i32 %tmp89, %tmp90, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.6.7 = add nsw i32 %tmp85, %tmp88, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.6.7, i32* %tempResult.addr.15, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.16 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.1.0.7, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.1.7 = mul nsw i32 %tempB.load.56, %tempA.load.8, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.1 = mul nsw i32 %tempB.load.57, %tempA.load.9, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.2 = mul nsw i32 %tempB.load.58, %tempA.load.10, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.3 = mul nsw i32 %tempB.load.59, %tempA.load.11, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.4 = mul nsw i32 %tempB.load.60, %tempA.load.12, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.5 = mul nsw i32 %tempB.load.61, %tempA.load.13, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.6 = mul nsw i32 %tempB.load.62, %tempA.load.14, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.1.7.7 = mul nsw i32 %tempB.load.63, %tempA.load.15, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp92 = add i32 %tmp.10.1.7, %tmp.10.1.7.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp93 = add i32 %tmp.10.1.7.3, %tmp.10.1.7.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp91 = add i32 %tmp92, %tmp93, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp95 = add i32 %tmp.10.1.7.5, %tmp.10.1.7.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp96 = add i32 %tmp.10.1.7.7, %tmp.10.1.7.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp94 = add i32 %tmp95, %tmp96, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.1.7.7 = add nsw i32 %tmp91, %tmp94, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.1.7.7, i32* %tempResult.addr.16, align 4, !dbg !52 ; [debug line = 16:5]
  %tmp.2.2 = or i6 %tmp., 16, !dbg !63            ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp.6.2 = zext i6 %tmp.2.2 to i64, !dbg !63    ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult.addr.17 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.6.2, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA.addr.17 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.6.2, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.16 = load i32* %tempA.addr.17, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2 = mul nsw i32 %tempB.load, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0. = or i6 %tmp., 17, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.1 = zext i6 %tmp.8.2.0. to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.18 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.17 = load i32* %tempA.addr.18, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.1 = mul nsw i32 %tempB.load.1, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0.1 = or i6 %tmp., 18, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.2 = zext i6 %tmp.8.2.0.1 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.19 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.2, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.18 = load i32* %tempA.addr.19, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.2 = mul nsw i32 %tempB.load.2, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0.2 = or i6 %tmp., 19, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.3 = zext i6 %tmp.8.2.0.2 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.20 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.19 = load i32* %tempA.addr.20, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.3 = mul nsw i32 %tempB.load.3, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0.3 = or i6 %tmp., 20, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.4 = zext i6 %tmp.8.2.0.3 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.21 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.4, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.20 = load i32* %tempA.addr.21, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.4 = mul nsw i32 %tempB.load.4, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0.4 = or i6 %tmp., 21, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.5 = zext i6 %tmp.8.2.0.4 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.22 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.5, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.21 = load i32* %tempA.addr.22, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.5 = mul nsw i32 %tempB.load.5, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0.5 = or i6 %tmp., 22, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.6 = zext i6 %tmp.8.2.0.5 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.23 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.22 = load i32* %tempA.addr.23, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.6 = mul nsw i32 %tempB.load.6, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.2.0.6 = or i6 %tmp., 23, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.2.0.7 = zext i6 %tmp.8.2.0.6 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.24 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.2.0.7, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.23 = load i32* %tempA.addr.24, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.2.0.7 = mul nsw i32 %tempB.load.7, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp98 = add i32 %tmp.10.2, %tmp.10.2.0.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp99 = add i32 %tmp.10.2.0.3, %tmp.10.2.0.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp97 = add i32 %tmp98, %tmp99, !dbg !52       ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp101 = add i32 %tmp.10.2.0.5, %tmp.10.2.0.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp102 = add i32 %tmp.10.2.0.7, %tmp.10.2.0.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp100 = add i32 %tmp101, %tmp102, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.0.7 = add nsw i32 %tmp97, %tmp100, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.0.7, i32* %tempResult.addr.17, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.18 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.1, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.1 = mul nsw i32 %tempB.load.8, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.1 = mul nsw i32 %tempB.load.9, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.2 = mul nsw i32 %tempB.load.10, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.3 = mul nsw i32 %tempB.load.11, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.4 = mul nsw i32 %tempB.load.12, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.5 = mul nsw i32 %tempB.load.13, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.6 = mul nsw i32 %tempB.load.14, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.1.7 = mul nsw i32 %tempB.load.15, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp104 = add i32 %tmp.10.2.1, %tmp.10.2.1.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp105 = add i32 %tmp.10.2.1.3, %tmp.10.2.1.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp103 = add i32 %tmp104, %tmp105, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp107 = add i32 %tmp.10.2.1.5, %tmp.10.2.1.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp108 = add i32 %tmp.10.2.1.7, %tmp.10.2.1.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp106 = add i32 %tmp107, %tmp108, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.1.7 = add nsw i32 %tmp103, %tmp106, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.1.7, i32* %tempResult.addr.18, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.19 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.2, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.2 = mul nsw i32 %tempB.load.16, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.1 = mul nsw i32 %tempB.load.17, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.2 = mul nsw i32 %tempB.load.18, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.3 = mul nsw i32 %tempB.load.19, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.4 = mul nsw i32 %tempB.load.20, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.5 = mul nsw i32 %tempB.load.21, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.6 = mul nsw i32 %tempB.load.22, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.2.7 = mul nsw i32 %tempB.load.23, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp110 = add i32 %tmp.10.2.2, %tmp.10.2.2.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp111 = add i32 %tmp.10.2.2.3, %tmp.10.2.2.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp109 = add i32 %tmp110, %tmp111, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp113 = add i32 %tmp.10.2.2.5, %tmp.10.2.2.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp114 = add i32 %tmp.10.2.2.7, %tmp.10.2.2.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp112 = add i32 %tmp113, %tmp114, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.2.7 = add nsw i32 %tmp109, %tmp112, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.2.7, i32* %tempResult.addr.19, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.20 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.3, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.3 = mul nsw i32 %tempB.load.24, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.1 = mul nsw i32 %tempB.load.25, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.2 = mul nsw i32 %tempB.load.26, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.3 = mul nsw i32 %tempB.load.27, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.4 = mul nsw i32 %tempB.load.28, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.5 = mul nsw i32 %tempB.load.29, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.6 = mul nsw i32 %tempB.load.30, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.3.7 = mul nsw i32 %tempB.load.31, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp116 = add i32 %tmp.10.2.3, %tmp.10.2.3.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp117 = add i32 %tmp.10.2.3.3, %tmp.10.2.3.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp115 = add i32 %tmp116, %tmp117, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp119 = add i32 %tmp.10.2.3.5, %tmp.10.2.3.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp120 = add i32 %tmp.10.2.3.7, %tmp.10.2.3.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp118 = add i32 %tmp119, %tmp120, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.3.7 = add nsw i32 %tmp115, %tmp118, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.3.7, i32* %tempResult.addr.20, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.21 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.4, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.4 = mul nsw i32 %tempB.load.32, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.1 = mul nsw i32 %tempB.load.33, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.2 = mul nsw i32 %tempB.load.34, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.3 = mul nsw i32 %tempB.load.35, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.4 = mul nsw i32 %tempB.load.36, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.5 = mul nsw i32 %tempB.load.37, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.6 = mul nsw i32 %tempB.load.38, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.4.7 = mul nsw i32 %tempB.load.39, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp122 = add i32 %tmp.10.2.4, %tmp.10.2.4.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp123 = add i32 %tmp.10.2.4.3, %tmp.10.2.4.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp121 = add i32 %tmp122, %tmp123, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp125 = add i32 %tmp.10.2.4.5, %tmp.10.2.4.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp126 = add i32 %tmp.10.2.4.7, %tmp.10.2.4.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp124 = add i32 %tmp125, %tmp126, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.4.7 = add nsw i32 %tmp121, %tmp124, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.4.7, i32* %tempResult.addr.21, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.22 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.5, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.5 = mul nsw i32 %tempB.load.40, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.1 = mul nsw i32 %tempB.load.41, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.2 = mul nsw i32 %tempB.load.42, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.3 = mul nsw i32 %tempB.load.43, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.4 = mul nsw i32 %tempB.load.44, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.5 = mul nsw i32 %tempB.load.45, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.6 = mul nsw i32 %tempB.load.46, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.5.7 = mul nsw i32 %tempB.load.47, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp128 = add i32 %tmp.10.2.5, %tmp.10.2.5.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp129 = add i32 %tmp.10.2.5.3, %tmp.10.2.5.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp127 = add i32 %tmp128, %tmp129, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp131 = add i32 %tmp.10.2.5.5, %tmp.10.2.5.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp132 = add i32 %tmp.10.2.5.7, %tmp.10.2.5.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp130 = add i32 %tmp131, %tmp132, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.5.7 = add nsw i32 %tmp127, %tmp130, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.5.7, i32* %tempResult.addr.22, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.23 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.6, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.6 = mul nsw i32 %tempB.load.48, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.1 = mul nsw i32 %tempB.load.49, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.2 = mul nsw i32 %tempB.load.50, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.3 = mul nsw i32 %tempB.load.51, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.4 = mul nsw i32 %tempB.load.52, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.5 = mul nsw i32 %tempB.load.53, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.6 = mul nsw i32 %tempB.load.54, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.6.7 = mul nsw i32 %tempB.load.55, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp134 = add i32 %tmp.10.2.6, %tmp.10.2.6.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp135 = add i32 %tmp.10.2.6.3, %tmp.10.2.6.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp133 = add i32 %tmp134, %tmp135, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp137 = add i32 %tmp.10.2.6.5, %tmp.10.2.6.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp138 = add i32 %tmp.10.2.6.7, %tmp.10.2.6.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp136 = add i32 %tmp137, %tmp138, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.6.7 = add nsw i32 %tmp133, %tmp136, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.6.7, i32* %tempResult.addr.23, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.24 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.2.0.7, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.2.7 = mul nsw i32 %tempB.load.56, %tempA.load.16, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.1 = mul nsw i32 %tempB.load.57, %tempA.load.17, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.2 = mul nsw i32 %tempB.load.58, %tempA.load.18, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.3 = mul nsw i32 %tempB.load.59, %tempA.load.19, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.4 = mul nsw i32 %tempB.load.60, %tempA.load.20, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.5 = mul nsw i32 %tempB.load.61, %tempA.load.21, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.6 = mul nsw i32 %tempB.load.62, %tempA.load.22, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.2.7.7 = mul nsw i32 %tempB.load.63, %tempA.load.23, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp140 = add i32 %tmp.10.2.7, %tmp.10.2.7.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp141 = add i32 %tmp.10.2.7.3, %tmp.10.2.7.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp139 = add i32 %tmp140, %tmp141, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp143 = add i32 %tmp.10.2.7.5, %tmp.10.2.7.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp144 = add i32 %tmp.10.2.7.7, %tmp.10.2.7.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp142 = add i32 %tmp143, %tmp144, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.2.7.7 = add nsw i32 %tmp139, %tmp142, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.2.7.7, i32* %tempResult.addr.24, align 4, !dbg !52 ; [debug line = 16:5]
  %tmp.2.3 = or i6 %tmp., 24, !dbg !63            ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp.6.3 = zext i6 %tmp.2.3 to i64, !dbg !63    ; [#uses=2 type=i64] [debug line = 13:4]
  %tempResult.addr.25 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.6.3, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tempA.addr.25 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.6.3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.24 = load i32* %tempA.addr.25, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3 = mul nsw i32 %tempB.load, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0. = or i6 %tmp., 25, !dbg !52         ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.1 = zext i6 %tmp.8.3.0. to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.26 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.1, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.25 = load i32* %tempA.addr.26, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.1 = mul nsw i32 %tempB.load.1, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0.1 = or i6 %tmp., 26, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.2 = zext i6 %tmp.8.3.0.1 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.27 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.2, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.26 = load i32* %tempA.addr.27, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.2 = mul nsw i32 %tempB.load.2, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0.2 = or i6 %tmp., 27, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.3 = zext i6 %tmp.8.3.0.2 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.28 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.3, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.27 = load i32* %tempA.addr.28, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.3 = mul nsw i32 %tempB.load.3, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0.3 = or i6 %tmp., 28, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.4 = zext i6 %tmp.8.3.0.3 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.29 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.4, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.28 = load i32* %tempA.addr.29, align 16, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.4 = mul nsw i32 %tempB.load.4, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0.4 = or i6 %tmp., 29, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.5 = zext i6 %tmp.8.3.0.4 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.30 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.5, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.29 = load i32* %tempA.addr.30, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.5 = mul nsw i32 %tempB.load.5, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0.5 = or i6 %tmp., 30, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.6 = zext i6 %tmp.8.3.0.5 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.31 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.30 = load i32* %tempA.addr.31, align 8, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.6 = mul nsw i32 %tempB.load.6, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.8.3.0.6 = or i6 %tmp., 31, !dbg !52        ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp.9.3.0.7 = zext i6 %tmp.8.3.0.6 to i64, !dbg !52 ; [#uses=2 type=i64] [debug line = 16:5]
  %tempA.addr.32 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp.9.3.0.7, !dbg !52 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA.load.31 = load i32* %tempA.addr.32, align 4, !dbg !52 ; [#uses=8 type=i32] [debug line = 16:5]
  %tmp.10.3.0.7 = mul nsw i32 %tempB.load.7, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp146 = add i32 %tmp.10.3, %tmp.10.3.0.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp147 = add i32 %tmp.10.3.0.3, %tmp.10.3.0.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp145 = add i32 %tmp146, %tmp147, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp149 = add i32 %tmp.10.3.0.5, %tmp.10.3.0.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp150 = add i32 %tmp.10.3.0.7, %tmp.10.3.0.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp148 = add i32 %tmp149, %tmp150, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.0.7 = add nsw i32 %tmp145, %tmp148, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.0.7, i32* %tempResult.addr.25, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.26 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.1, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.1 = mul nsw i32 %tempB.load.8, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.1 = mul nsw i32 %tempB.load.9, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.2 = mul nsw i32 %tempB.load.10, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.3 = mul nsw i32 %tempB.load.11, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.4 = mul nsw i32 %tempB.load.12, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.5 = mul nsw i32 %tempB.load.13, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.6 = mul nsw i32 %tempB.load.14, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.1.7 = mul nsw i32 %tempB.load.15, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp152 = add i32 %tmp.10.3.1, %tmp.10.3.1.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp153 = add i32 %tmp.10.3.1.3, %tmp.10.3.1.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp151 = add i32 %tmp152, %tmp153, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp155 = add i32 %tmp.10.3.1.5, %tmp.10.3.1.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp156 = add i32 %tmp.10.3.1.7, %tmp.10.3.1.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp154 = add i32 %tmp155, %tmp156, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.1.7 = add nsw i32 %tmp151, %tmp154, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.1.7, i32* %tempResult.addr.26, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.27 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.2, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.2 = mul nsw i32 %tempB.load.16, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.1 = mul nsw i32 %tempB.load.17, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.2 = mul nsw i32 %tempB.load.18, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.3 = mul nsw i32 %tempB.load.19, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.4 = mul nsw i32 %tempB.load.20, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.5 = mul nsw i32 %tempB.load.21, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.6 = mul nsw i32 %tempB.load.22, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.2.7 = mul nsw i32 %tempB.load.23, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp158 = add i32 %tmp.10.3.2, %tmp.10.3.2.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp159 = add i32 %tmp.10.3.2.3, %tmp.10.3.2.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp157 = add i32 %tmp158, %tmp159, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp161 = add i32 %tmp.10.3.2.5, %tmp.10.3.2.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp162 = add i32 %tmp.10.3.2.7, %tmp.10.3.2.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp160 = add i32 %tmp161, %tmp162, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.2.7 = add nsw i32 %tmp157, %tmp160, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.2.7, i32* %tempResult.addr.27, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.28 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.3, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.3 = mul nsw i32 %tempB.load.24, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.1 = mul nsw i32 %tempB.load.25, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.2 = mul nsw i32 %tempB.load.26, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.3 = mul nsw i32 %tempB.load.27, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.4 = mul nsw i32 %tempB.load.28, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.5 = mul nsw i32 %tempB.load.29, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.6 = mul nsw i32 %tempB.load.30, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.3.7 = mul nsw i32 %tempB.load.31, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp164 = add i32 %tmp.10.3.3, %tmp.10.3.3.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp165 = add i32 %tmp.10.3.3.3, %tmp.10.3.3.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp163 = add i32 %tmp164, %tmp165, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp167 = add i32 %tmp.10.3.3.5, %tmp.10.3.3.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp168 = add i32 %tmp.10.3.3.7, %tmp.10.3.3.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp166 = add i32 %tmp167, %tmp168, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.3.7 = add nsw i32 %tmp163, %tmp166, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.3.7, i32* %tempResult.addr.28, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.29 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.4, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.4 = mul nsw i32 %tempB.load.32, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.1 = mul nsw i32 %tempB.load.33, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.2 = mul nsw i32 %tempB.load.34, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.3 = mul nsw i32 %tempB.load.35, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.4 = mul nsw i32 %tempB.load.36, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.5 = mul nsw i32 %tempB.load.37, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.6 = mul nsw i32 %tempB.load.38, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.4.7 = mul nsw i32 %tempB.load.39, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp170 = add i32 %tmp.10.3.4, %tmp.10.3.4.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp171 = add i32 %tmp.10.3.4.3, %tmp.10.3.4.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp169 = add i32 %tmp170, %tmp171, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp173 = add i32 %tmp.10.3.4.5, %tmp.10.3.4.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp174 = add i32 %tmp.10.3.4.7, %tmp.10.3.4.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp172 = add i32 %tmp173, %tmp174, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.4.7 = add nsw i32 %tmp169, %tmp172, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.4.7, i32* %tempResult.addr.29, align 16, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.30 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.5, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.5 = mul nsw i32 %tempB.load.40, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.1 = mul nsw i32 %tempB.load.41, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.2 = mul nsw i32 %tempB.load.42, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.3 = mul nsw i32 %tempB.load.43, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.4 = mul nsw i32 %tempB.load.44, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.5 = mul nsw i32 %tempB.load.45, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.6 = mul nsw i32 %tempB.load.46, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.5.7 = mul nsw i32 %tempB.load.47, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp176 = add i32 %tmp.10.3.5, %tmp.10.3.5.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp177 = add i32 %tmp.10.3.5.3, %tmp.10.3.5.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp175 = add i32 %tmp176, %tmp177, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp179 = add i32 %tmp.10.3.5.5, %tmp.10.3.5.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp180 = add i32 %tmp.10.3.5.7, %tmp.10.3.5.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp178 = add i32 %tmp179, %tmp180, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.5.7 = add nsw i32 %tmp175, %tmp178, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.5.7, i32* %tempResult.addr.30, align 4, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.31 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.6, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.6 = mul nsw i32 %tempB.load.48, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.1 = mul nsw i32 %tempB.load.49, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.2 = mul nsw i32 %tempB.load.50, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.3 = mul nsw i32 %tempB.load.51, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.4 = mul nsw i32 %tempB.load.52, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.5 = mul nsw i32 %tempB.load.53, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.6 = mul nsw i32 %tempB.load.54, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.6.7 = mul nsw i32 %tempB.load.55, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp182 = add i32 %tmp.10.3.6, %tmp.10.3.6.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp183 = add i32 %tmp.10.3.6.3, %tmp.10.3.6.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp181 = add i32 %tmp182, %tmp183, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp185 = add i32 %tmp.10.3.6.5, %tmp.10.3.6.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp186 = add i32 %tmp.10.3.6.7, %tmp.10.3.6.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp184 = add i32 %tmp185, %tmp186, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.6.7 = add nsw i32 %tmp181, %tmp184, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.6.7, i32* %tempResult.addr.31, align 8, !dbg !52 ; [debug line = 16:5]
  %tempResult.addr.32 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp.9.3.0.7, !dbg !63 ; [#uses=1 type=i32*] [debug line = 13:4]
  %tmp.10.3.7 = mul nsw i32 %tempB.load.56, %tempA.load.24, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.1 = mul nsw i32 %tempB.load.57, %tempA.load.25, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.2 = mul nsw i32 %tempB.load.58, %tempA.load.26, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.3 = mul nsw i32 %tempB.load.59, %tempA.load.27, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.4 = mul nsw i32 %tempB.load.60, %tempA.load.28, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.5 = mul nsw i32 %tempB.load.61, %tempA.load.29, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.6 = mul nsw i32 %tempB.load.62, %tempA.load.30, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.10.3.7.7 = mul nsw i32 %tempB.load.63, %tempA.load.31, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp188 = add i32 %tmp.10.3.7, %tmp.10.3.7.1, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp189 = add i32 %tmp.10.3.7.3, %tmp.10.3.7.2, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp187 = add i32 %tmp188, %tmp189, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp191 = add i32 %tmp.10.3.7.5, %tmp.10.3.7.4, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp192 = add i32 %tmp.10.3.7.7, %tmp.10.3.7.6, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp190 = add i32 %tmp191, %tmp192, !dbg !52    ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp.11.3.7.7 = add nsw i32 %tmp187, %tmp190, !dbg !52 ; [#uses=1 type=i32] [debug line = 16:5]
  store i32 %tmp.11.3.7.7, i32* %tempResult.addr.32, align 4, !dbg !52 ; [debug line = 16:5]
  %i.1.3 = add i4 %i, 4, !dbg !65                 ; [#uses=1 type=i4] [debug line = 10:25]
  br label %burst.rd.end6.0, !dbg !65             ; [debug line = 10:25]

burst.wr.header:                                  ; preds = %burst.wr.body, %burst.wr.header.preheader
  %indvar1 = phi i7 [ %indvar.next2, %burst.wr.body ], [ 0, %burst.wr.header.preheader ] ; [#uses=3 type=i7]
  %exitcond5 = icmp eq i7 %indvar1, -64           ; [#uses=1 type=i1]
  %7 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  br i1 %exitcond5, label %memcpy.tail, label %burst.wr.body

burst.wr.body:                                    ; preds = %burst.wr.header
  %burstwrite.rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([18 x i8]* @burstwrite_OC_region.str) nounwind ; [#uses=1 type=i32]
  %8 = call i32 (...)* @_ssdm_op_SpecBurst([64 x i32]* %result, i32 0, i32 64, i32 1) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str9)
  call void (...)* @_ssdm_op_SpecLoopName([29 x i8]* @memcpy_OC_result_OC_tempResult_OC_gep.str)
  %indvar.next2 = add i7 %indvar1, 1              ; [#uses=1 type=i7]
  %tmp.3 = zext i7 %indvar1 to i64, !dbg !66      ; [#uses=2 type=i64] [debug line = 18:2]
  %tempResult.addr = getelementptr [64 x i32]* %tempResult, i64 0, i64 %tmp.3, !dbg !66 ; [#uses=1 type=i32*] [debug line = 18:2]
  %tempResult.load = load i32* %tempResult.addr, align 4, !dbg !66 ; [#uses=1 type=i32] [debug line = 18:2]
  %result.addr = getelementptr [64 x i32]* %result, i64 0, i64 %tmp.3, !dbg !66 ; [#uses=1 type=i32*] [debug line = 18:2]
  store i32 %tempResult.load, i32* %result.addr, align 4, !dbg !66 ; [debug line = 18:2]
  %burstwrite.rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([18 x i8]* @burstwrite_OC_region.str, i32 %burstwrite.rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.wr.header

memcpy.tail:                                      ; preds = %burst.wr.header
  ret void, !dbg !67                              ; [debug line = 19:1]
}

; [#uses=3]
declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

; [#uses=3]
declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone

; [#uses=1]
declare void @_ssdm_op_SpecTopModule(...)

; [#uses=4]
declare i32 @_ssdm_op_SpecRegionEnd(...)

; [#uses=4]
declare i32 @_ssdm_op_SpecRegionBegin(...)

; [#uses=4]
declare void @_ssdm_op_SpecPipeline(...) nounwind

; [#uses=4]
declare i32 @_ssdm_op_SpecLoopTripCount(...)

; [#uses=4]
declare void @_ssdm_op_SpecLoopName(...) nounwind

; [#uses=4]
declare void @_ssdm_op_SpecInterface(...) nounwind

; [#uses=3]
declare i32 @_ssdm_op_SpecBurst(...)

; [#uses=3]
declare void @_ssdm_op_SpecBitsMap(...)

!llvm.dbg.cu = !{!0}
!opencl.kernels = !{!13}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}

!0 = metadata !{i32 786449, i32 0, i32 4, metadata !"/home/hakta/Documents/matrix_mult/solution2/.autopilot/db/matrix_mult.pragma.2.cpp", metadata !"/home/hakta/Documents", metadata !"clang version 3.1 ", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ]
!1 = metadata !{metadata !2}
!2 = metadata !{i32 0}
!3 = metadata !{metadata !4}
!4 = metadata !{metadata !5}
!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"matrix_mult", metadata !"matrix_mult", metadata !"_Z11matrix_multPiS_S_", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !11, i32 4} ; [ DW_TAG_subprogram ]
!6 = metadata !{i32 786473, metadata !"matrix_mult/matrix_mult.cpp", metadata !"/home/hakta/Documents", null} ; [ DW_TAG_file_type ]
!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
!8 = metadata !{null, metadata !9, metadata !9, metadata !9}
!9 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ]
!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
!11 = metadata !{metadata !12}
!12 = metadata !{i32 786468}                      ; [ DW_TAG_base_type ]
!13 = metadata !{null, metadata !14, metadata !15, metadata !16, metadata !17, metadata !18, metadata !19}
!14 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1, i32 1}
!15 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none"}
!16 = metadata !{metadata !"kernel_arg_type", metadata !"int*", metadata !"int*", metadata !"int*"}
!17 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !""}
!18 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B", metadata !"result"}
!19 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!20 = metadata !{metadata !21}
!21 = metadata !{i32 0, i32 31, metadata !22}
!22 = metadata !{metadata !23}
!23 = metadata !{metadata !"A", metadata !24, metadata !"int", i32 0, i32 31}
!24 = metadata !{metadata !25}
!25 = metadata !{i32 0, i32 63, i32 1}
!26 = metadata !{metadata !27}
!27 = metadata !{i32 0, i32 31, metadata !28}
!28 = metadata !{metadata !29}
!29 = metadata !{metadata !"B", metadata !24, metadata !"int", i32 0, i32 31}
!30 = metadata !{metadata !31}
!31 = metadata !{i32 0, i32 31, metadata !32}
!32 = metadata !{metadata !33}
!33 = metadata !{metadata !"result", metadata !24, metadata !"int", i32 0, i32 31}
!34 = metadata !{i32 786689, metadata !5, metadata !"A", null, i32 4, metadata !35, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!35 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 2048, i64 32, i32 0, i32 0, metadata !10, metadata !36, i32 0, i32 0} ; [ DW_TAG_array_type ]
!36 = metadata !{metadata !37}
!37 = metadata !{i32 786465, i64 0, i64 63}       ; [ DW_TAG_subrange_type ]
!38 = metadata !{i32 4, i32 22, metadata !5, null}
!39 = metadata !{i32 786689, metadata !5, metadata !"B", null, i32 4, metadata !35, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!40 = metadata !{i32 4, i32 34, metadata !5, null}
!41 = metadata !{i32 786689, metadata !5, metadata !"result", null, i32 4, metadata !35, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!42 = metadata !{i32 4, i32 46, metadata !5, null}
!43 = metadata !{i32 5, i32 1, metadata !44, null}
!44 = metadata !{i32 786443, metadata !5, i32 4, i32 59, metadata !6, i32 0} ; [ DW_TAG_lexical_block ]
!45 = metadata !{i32 786688, metadata !44, metadata !"tempA", metadata !6, i32 5, metadata !35, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!46 = metadata !{i32 5, i32 6, metadata !44, null}
!47 = metadata !{i32 786688, metadata !44, metadata !"tempB", metadata !6, i32 5, metadata !35, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!48 = metadata !{i32 5, i32 18, metadata !44, null}
!49 = metadata !{i32 786688, metadata !44, metadata !"tempResult", metadata !6, i32 5, metadata !35, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!50 = metadata !{i32 5, i32 30, metadata !44, null}
!51 = metadata !{i32 6, i32 2, metadata !44, null}
!52 = metadata !{i32 16, i32 5, metadata !53, null}
!53 = metadata !{i32 786443, metadata !54, i32 16, i32 5, metadata !6, i32 6} ; [ DW_TAG_lexical_block ]
!54 = metadata !{i32 786443, metadata !55, i32 15, i32 4, metadata !6, i32 5} ; [ DW_TAG_lexical_block ]
!55 = metadata !{i32 786443, metadata !56, i32 12, i32 31, metadata !6, i32 4} ; [ DW_TAG_lexical_block ]
!56 = metadata !{i32 786443, metadata !57, i32 12, i32 3, metadata !6, i32 3} ; [ DW_TAG_lexical_block ]
!57 = metadata !{i32 786443, metadata !58, i32 12, i32 1, metadata !6, i32 2} ; [ DW_TAG_lexical_block ]
!58 = metadata !{i32 786443, metadata !44, i32 10, i32 2, metadata !6, i32 1} ; [ DW_TAG_lexical_block ]
!59 = metadata !{i32 7, i32 2, metadata !44, null}
!60 = metadata !{i32 10, i32 16, metadata !58, null}
!61 = metadata !{i32 12, i32 2, metadata !57, null}
!62 = metadata !{i32 12, i32 1, metadata !57, null}
!63 = metadata !{i32 13, i32 4, metadata !55, null}
!64 = metadata !{i32 16, i32 61, metadata !56, null}
!65 = metadata !{i32 10, i32 25, metadata !58, null}
!66 = metadata !{i32 18, i32 2, metadata !44, null}
!67 = metadata !{i32 19, i32 1, metadata !44, null}