; ModuleID = '/home/hakta/Documents/matrix_mult/solution0/.autopilot/db/a.o.3.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@mode5 = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@mode3 = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@mode = internal constant [10 x i8] c"s_axilite\00" ; [#uses=1 type=[10 x i8]*]
@memcpy_OC_tempB_OC_B = internal unnamed_addr constant [15 x i8] c"memcpy.tempB.B\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_tempA_OC_A = internal unnamed_addr constant [15 x i8] c"memcpy.tempA.A\00" ; [#uses=1 type=[15 x i8]*]
@memcpy_OC_result_OC_s = internal unnamed_addr constant [29 x i8] c"memcpy.result.tempResult.gep\00" ; [#uses=1 type=[29 x i8]*]
@matrix_mult_str = internal unnamed_addr constant [12 x i8] c"matrix_mult\00" ; [#uses=1 type=[12 x i8]*]
@burstwrite_OC_region = internal unnamed_addr constant [18 x i8] c"burstwrite.region\00" ; [#uses=2 type=[18 x i8]*]
@burstread_OC_region_s = internal unnamed_addr constant [17 x i8] c"burstread.region\00" ; [#uses=4 type=[17 x i8]*]
@bundle6 = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@bundle4 = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@bundle = internal constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str9 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str8 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str7 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*]
@p_str6 = private unnamed_addr constant [28 x i8] c"matrix_mult__innermost_loop\00", align 1 ; [#uses=1 type=[28 x i8]*]
@p_str5 = private unnamed_addr constant [24 x i8] c"matrix_mult__inner_loop\00", align 1 ; [#uses=3 type=[24 x i8]*]
@p_str4 = private unnamed_addr constant [24 x i8] c"matrix_mult__outer_loop\00", align 1 ; [#uses=3 type=[24 x i8]*]
@p_str3 = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1 ; [#uses=1 type=[10 x i8]*]
@p_str2 = private unnamed_addr constant [6 x i8] c"slave\00", align 1 ; [#uses=4 type=[6 x i8]*]
@p_str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 ; [#uses=23 type=[1 x i8]*]
@p_str = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1 ; [#uses=1 type=[6 x i8]*]

; [#uses=0]
define void @matrix_mult(i32* %gmem, i32 %A, i32 %B, i32 %result) {
  %result_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %result) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %result_read}, i64 0, metadata !11), !dbg !23 ; [debug line = 4:46] [debug variable = result]
  %B_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %B) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %B_read}, i64 0, metadata !24), !dbg !25 ; [debug line = 4:34] [debug variable = B]
  %A_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %A) ; [#uses=1 type=i32]
  call void @llvm.dbg.value(metadata !{i32 %A_read}, i64 0, metadata !26), !dbg !27 ; [debug line = 4:22] [debug variable = A]
  %result5 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %result_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_14 = zext i30 %result5 to i64              ; [#uses=1 type=i64]
  %gmem_addr = getelementptr i32* %gmem, i64 %tmp_14 ; [#uses=3 type=i32*]
  %B3 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %B_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_15 = zext i30 %B3 to i64                   ; [#uses=1 type=i64]
  %gmem_addr_1 = getelementptr i32* %gmem, i64 %tmp_15 ; [#uses=2 type=i32*]
  %A1 = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %A_read, i32 2, i32 31) ; [#uses=1 type=i30]
  %tmp_16 = zext i30 %A1 to i64                   ; [#uses=1 type=i64]
  %gmem_addr_2 = getelementptr i32* %gmem, i64 %tmp_16 ; [#uses=2 type=i32*]
  call void (...)* @_ssdm_op_SpecBitsMap(i32* %gmem), !map !28
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @matrix_mult_str) nounwind
  %tempA = alloca [64 x i32], align 16            ; [#uses=2 type=[64 x i32]*]
  %tempB = alloca [64 x i32], align 16            ; [#uses=2 type=[64 x i32]*]
  %tempResult = alloca [64 x i32], align 16       ; [#uses=2 type=[64 x i32]*]
  call void @llvm.dbg.value(metadata !{i32 %A}, i64 0, metadata !26), !dbg !27 ; [debug line = 4:22] [debug variable = A]
  call void @llvm.dbg.value(metadata !{i32 %B}, i64 0, metadata !24), !dbg !25 ; [debug line = 4:34] [debug variable = B]
  call void @llvm.dbg.value(metadata !{i32 %result}, i64 0, metadata !11), !dbg !23 ; [debug line = 4:46] [debug variable = result]
  call void (...)* @_ssdm_op_SpecInterface(i32 %result, [10 x i8]* @mode5, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle6, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %B, [10 x i8]* @mode3, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle4, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @p_str3, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind, !dbg !36 ; [debug line = 5:1]
  call void (...)* @_ssdm_op_SpecInterface(i32* %gmem, [6 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @p_str1, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %A, [10 x i8]* @mode, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 32, [1 x i8]* @bundle, [6 x i8]* @p_str2, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempA}, metadata !38), !dbg !39 ; [debug line = 5:6] [debug variable = tempA]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempB}, metadata !40), !dbg !41 ; [debug line = 5:18] [debug variable = tempB]
  call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempResult}, metadata !42), !dbg !43 ; [debug line = 5:30] [debug variable = tempResult]
  %gmem_addr_2_rd_req = call i1 @_ssdm_op_ReadReq.m_axi.i32P(i32* %gmem_addr_2, i32 64), !dbg !44 ; [#uses=0 type=i1] [debug line = 6:2]
  br label %burst.rd.header

burst.rd.header:                                  ; preds = %burst.rd.body, %0
  %indvar = phi i7 [ 0, %0 ], [ %indvar_next, %burst.rd.body ] ; [#uses=3 type=i7]
  %exitcond3 = icmp eq i7 %indvar, -64            ; [#uses=1 type=i1]
  %indvar_next = add i7 %indvar, 1                ; [#uses=1 type=i7]
  br i1 %exitcond3, label %burst.rd.header7.preheader, label %burst.rd.body

burst.rd.header7.preheader:                       ; preds = %burst.rd.header
  %gmem_addr_1_rd_req = call i1 @_ssdm_op_ReadReq.m_axi.i32P(i32* %gmem_addr_1, i32 64), !dbg !45 ; [#uses=0 type=i1] [debug line = 7:2]
  br label %burst.rd.header7

burst.rd.body:                                    ; preds = %burst.rd.header
  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstread_rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region_s) nounwind ; [#uses=1 type=i32]
  %empty_5 = call i32 (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str7) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempA_OC_A)
  %tmp = zext i7 %indvar to i64, !dbg !44         ; [#uses=1 type=i64] [debug line = 6:2]
  %gmem_addr_2_read = call i32 @_ssdm_op_Read.m_axi.i32P(i32* %gmem_addr_2), !dbg !44 ; [#uses=1 type=i32] [debug line = 6:2]
  %tempA_addr = getelementptr [64 x i32]* %tempA, i64 0, i64 %tmp, !dbg !44 ; [#uses=1 type=i32*] [debug line = 6:2]
  store i32 %gmem_addr_2_read, i32* %tempA_addr, align 4, !dbg !44 ; [debug line = 6:2]
  %burstread_rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region_s, i32 %burstread_rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header

burst.rd.header7:                                 ; preds = %burst.rd.body8, %burst.rd.header7.preheader
  %indvar9 = phi i7 [ %indvar_next1, %burst.rd.body8 ], [ 0, %burst.rd.header7.preheader ] ; [#uses=3 type=i7]
  %exitcond4 = icmp eq i7 %indvar9, -64           ; [#uses=1 type=i1]
  %indvar_next1 = add i7 %indvar9, 1              ; [#uses=1 type=i7]
  br i1 %exitcond4, label %burst.rd.end6.preheader, label %burst.rd.body8

burst.rd.end6.preheader:                          ; preds = %burst.rd.header7
  br label %burst.rd.end6, !dbg !46               ; [debug line = 10:16]

burst.rd.body8:                                   ; preds = %burst.rd.header7
  %empty_6 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstread_rbegin1 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region_s) nounwind ; [#uses=1 type=i32]
  %empty_7 = call i32 (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str8) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempB_OC_B)
  %tmp_1 = zext i7 %indvar9 to i64, !dbg !45      ; [#uses=1 type=i64] [debug line = 7:2]
  %gmem_addr_1_read = call i32 @_ssdm_op_Read.m_axi.i32P(i32* %gmem_addr_1), !dbg !45 ; [#uses=1 type=i32] [debug line = 7:2]
  %tempB_addr = getelementptr [64 x i32]* %tempB, i64 0, i64 %tmp_1, !dbg !45 ; [#uses=1 type=i32*] [debug line = 7:2]
  store i32 %gmem_addr_1_read, i32* %tempB_addr, align 4, !dbg !45 ; [debug line = 7:2]
  %burstread_rend14 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region_s, i32 %burstread_rbegin1) nounwind ; [#uses=0 type=i32]
  br label %burst.rd.header7

burst.rd.end6:                                    ; preds = %7, %burst.rd.end6.preheader
  %i = phi i4 [ %i_1, %7 ], [ 0, %burst.rd.end6.preheader ] ; [#uses=3 type=i4]
  %exitcond2 = icmp eq i4 %i, -8, !dbg !46        ; [#uses=1 type=i1] [debug line = 10:16]
  %empty_8 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32]
  %i_1 = add i4 %i, 1, !dbg !48                   ; [#uses=1 type=i4] [debug line = 10:25]
  br i1 %exitcond2, label %burst.wr.header.preheader, label %1, !dbg !46 ; [debug line = 10:16]

burst.wr.header.preheader:                        ; preds = %burst.rd.end6
  %gmem_addr_wr_req = call i1 @_ssdm_op_WriteReq.m_axi.i32P(i32* %gmem_addr, i32 64), !dbg !49 ; [#uses=0 type=i1] [debug line = 18:2]
  br label %burst.wr.header

; <label>:1                                       ; preds = %burst.rd.end6
  call void (...)* @_ssdm_op_SpecLoopName([24 x i8]* @p_str4) nounwind, !dbg !50 ; [debug line = 11:3]
  %tmp_12 = call i32 (...)* @_ssdm_op_SpecRegionBegin([24 x i8]* @p_str4) nounwind, !dbg !50 ; [#uses=1 type=i32] [debug line = 11:3]
  %tmp_17 = trunc i4 %i to i3                     ; [#uses=1 type=i3]
  %tmp_2 = call i6 @_ssdm_op_BitConcatenate.i6.i3.i3(i3 %tmp_17, i3 0), !dbg !52 ; [#uses=2 type=i6] [debug line = 13:4]
  br label %2, !dbg !55                           ; [debug line = 12:17]

; <label>:2                                       ; preds = %6, %1
  %j = phi i4 [ 0, %1 ], [ %j_1, %6 ]             ; [#uses=3 type=i4]
  %j_cast3 = zext i4 %j to i6, !dbg !55           ; [#uses=2 type=i6] [debug line = 12:17]
  %exitcond1 = icmp eq i4 %j, -8, !dbg !55        ; [#uses=1 type=i1] [debug line = 12:17]
  %empty_9 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32]
  %j_1 = add i4 %j, 1, !dbg !56                   ; [#uses=1 type=i4] [debug line = 12:26]
  br i1 %exitcond1, label %7, label %3, !dbg !55  ; [debug line = 12:17]

; <label>:3                                       ; preds = %2
  call void (...)* @_ssdm_op_SpecLoopName([24 x i8]* @p_str5) nounwind, !dbg !57 ; [debug line = 12:32]
  %tmp_13 = call i32 (...)* @_ssdm_op_SpecRegionBegin([24 x i8]* @p_str5) nounwind, !dbg !57 ; [#uses=1 type=i32] [debug line = 12:32]
  %tmp_5 = add i6 %tmp_2, %j_cast3, !dbg !52      ; [#uses=1 type=i6] [debug line = 13:4]
  %tmp_6 = zext i6 %tmp_5 to i64, !dbg !52        ; [#uses=1 type=i64] [debug line = 13:4]
  %tempResult_addr_1 = getelementptr inbounds [64 x i32]* %tempResult, i64 0, i64 %tmp_6, !dbg !52 ; [#uses=1 type=i32*] [debug line = 13:4]
  br label %4, !dbg !58                           ; [debug line = 15:18]

; <label>:4                                       ; preds = %5, %3
  %tempResult_load_1 = phi i32 [ 0, %3 ], [ %tmp_11, %5 ] ; [#uses=2 type=i32]
  %k = phi i4 [ 0, %3 ], [ %k_1, %5 ]             ; [#uses=4 type=i4]
  store i32 %tempResult_load_1, i32* %tempResult_addr_1, align 4, !dbg !60 ; [debug line = 16:5]
  %k_cast2 = zext i4 %k to i6, !dbg !58           ; [#uses=1 type=i6] [debug line = 15:18]
  %exitcond = icmp eq i4 %k, -8, !dbg !58         ; [#uses=1 type=i1] [debug line = 15:18]
  %empty_10 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32]
  %k_1 = add i4 %k, 1, !dbg !62                   ; [#uses=1 type=i4] [debug line = 15:27]
  br i1 %exitcond, label %6, label %5, !dbg !58   ; [debug line = 15:18]

; <label>:5                                       ; preds = %4
  call void (...)* @_ssdm_op_SpecLoopName([28 x i8]* @p_str6) nounwind, !dbg !60 ; [debug line = 16:5]
  %tmp_8 = add i6 %k_cast2, %tmp_2, !dbg !60      ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_9 = zext i6 %tmp_8 to i64, !dbg !60        ; [#uses=1 type=i64] [debug line = 16:5]
  %tempA_addr_1 = getelementptr inbounds [64 x i32]* %tempA, i64 0, i64 %tmp_9, !dbg !60 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempA_load = load i32* %tempA_addr_1, align 4, !dbg !60 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_18 = trunc i4 %k to i3                     ; [#uses=1 type=i3]
  %tmp_s = call i6 @_ssdm_op_BitConcatenate.i6.i3.i3(i3 %tmp_18, i3 0), !dbg !60 ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_4 = add i6 %tmp_s, %j_cast3, !dbg !60      ; [#uses=1 type=i6] [debug line = 16:5]
  %tmp_7 = zext i6 %tmp_4 to i64, !dbg !60        ; [#uses=1 type=i64] [debug line = 16:5]
  %tempB_addr_1 = getelementptr inbounds [64 x i32]* %tempB, i64 0, i64 %tmp_7, !dbg !60 ; [#uses=1 type=i32*] [debug line = 16:5]
  %tempB_load = load i32* %tempB_addr_1, align 4, !dbg !60 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_10 = mul nsw i32 %tempB_load, %tempA_load, !dbg !60 ; [#uses=1 type=i32] [debug line = 16:5]
  %tmp_11 = add nsw i32 %tmp_10, %tempResult_load_1, !dbg !60 ; [#uses=1 type=i32] [debug line = 16:5]
  call void @llvm.dbg.value(metadata !{i4 %k_1}, i64 0, metadata !63), !dbg !62 ; [debug line = 15:27] [debug variable = k]
  br label %4, !dbg !62                           ; [debug line = 15:27]

; <label>:6                                       ; preds = %4
  %empty_11 = call i32 (...)* @_ssdm_op_SpecRegionEnd([24 x i8]* @p_str5, i32 %tmp_13) nounwind, !dbg !64 ; [#uses=0 type=i32] [debug line = 16:61]
  call void @llvm.dbg.value(metadata !{i4 %j_1}, i64 0, metadata !65), !dbg !56 ; [debug line = 12:26] [debug variable = j]
  br label %2, !dbg !56                           ; [debug line = 12:26]

; <label>:7                                       ; preds = %2
  %empty_12 = call i32 (...)* @_ssdm_op_SpecRegionEnd([24 x i8]* @p_str4, i32 %tmp_12) nounwind, !dbg !66 ; [#uses=0 type=i32] [debug line = 16:61]
  call void @llvm.dbg.value(metadata !{i4 %i_1}, i64 0, metadata !67), !dbg !48 ; [debug line = 10:25] [debug variable = i]
  br label %burst.rd.end6, !dbg !48               ; [debug line = 10:25]

burst.wr.header:                                  ; preds = %burst.wr.body, %burst.wr.header.preheader
  %indvar1 = phi i7 [ %indvar_next2, %burst.wr.body ], [ 0, %burst.wr.header.preheader ] ; [#uses=3 type=i7]
  %exitcond5 = icmp eq i7 %indvar1, -64           ; [#uses=1 type=i1]
  %indvar_next2 = add i7 %indvar1, 1              ; [#uses=1 type=i7]
  br i1 %exitcond5, label %memcpy.tail, label %burst.wr.body

burst.wr.body:                                    ; preds = %burst.wr.header
  %empty_13 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32]
  %burstwrite_rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([18 x i8]* @burstwrite_OC_region) nounwind ; [#uses=1 type=i32]
  %empty_14 = call i32 (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @p_str9) nounwind ; [#uses=0 type=i32]
  call void (...)* @_ssdm_op_SpecLoopName([29 x i8]* @memcpy_OC_result_OC_s)
  %tmp_3 = zext i7 %indvar1 to i64, !dbg !49      ; [#uses=1 type=i64] [debug line = 18:2]
  %tempResult_addr = getelementptr [64 x i32]* %tempResult, i64 0, i64 %tmp_3, !dbg !49 ; [#uses=1 type=i32*] [debug line = 18:2]
  %tempResult_load = load i32* %tempResult_addr, align 4, !dbg !49 ; [#uses=1 type=i32] [debug line = 18:2]
  call void @_ssdm_op_Write.m_axi.i32P(i32* %gmem_addr, i32 %tempResult_load, i4 -1), !dbg !49 ; [debug line = 18:2]
  %burstwrite_rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([18 x i8]* @burstwrite_OC_region, i32 %burstwrite_rbegin) nounwind ; [#uses=0 type=i32]
  br label %burst.wr.header

memcpy.tail:                                      ; preds = %burst.wr.header
  %gmem_addr_wr_resp = call i1 @_ssdm_op_WriteResp.m_axi.i32P(i32* %gmem_addr), !dbg !49 ; [#uses=0 type=i1] [debug line = 18:2]
  ret void, !dbg !68                              ; [debug line = 19:1]
}

; [#uses=1]
declare i32 @llvm.part.select.i32(i32, i32, i32) nounwind readnone

; [#uses=9]
declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

; [#uses=3]
declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone

; [#uses=1]
define weak i1 @_ssdm_op_WriteResp.m_axi.i32P(i32*) {
entry:
  ret i1 true
}

; [#uses=1]
define weak i1 @_ssdm_op_WriteReq.m_axi.i32P(i32*, i32) {
entry:
  ret i1 true
}

; [#uses=1]
define weak void @_ssdm_op_Write.m_axi.i32P(i32*, i32, i4) {
entry:
  ret void
}

; [#uses=1]
define weak void @_ssdm_op_SpecTopModule(...) {
entry:
  ret void
}

; [#uses=5]
define weak i32 @_ssdm_op_SpecRegionEnd(...) {
entry:
  ret i32 0
}

; [#uses=5]
define weak i32 @_ssdm_op_SpecRegionBegin(...) {
entry:
  ret i32 0
}

; [#uses=3]
define weak i32 @_ssdm_op_SpecPipeline(...) {
entry:
  ret i32 0
}

; [#uses=6]
define weak i32 @_ssdm_op_SpecLoopTripCount(...) {
entry:
  ret i32 0
}

; [#uses=6]
define weak void @_ssdm_op_SpecLoopName(...) nounwind {
entry:
  ret void
}

; [#uses=5]
define weak void @_ssdm_op_SpecInterface(...) nounwind {
entry:
  ret void
}

; [#uses=1]
define weak void @_ssdm_op_SpecBitsMap(...) {
entry:
  ret void
}

; [#uses=2]
define weak i1 @_ssdm_op_ReadReq.m_axi.i32P(i32*, i32) {
entry:
  ret i1 true
}

; [#uses=3]
define weak i32 @_ssdm_op_Read.s_axilite.i32(i32) {
entry:
  ret i32 %0
}

; [#uses=2]
define weak i32 @_ssdm_op_Read.m_axi.i32P(i32*) {
entry:
  %empty = load i32* %0                           ; [#uses=1 type=i32]
  ret i32 %empty
}

; [#uses=3]
define weak i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32, i32, i32) nounwind readnone {
entry:
  %empty = call i32 @llvm.part.select.i32(i32 %0, i32 %1, i32 %2) ; [#uses=1 type=i32]
  %empty_15 = trunc i32 %empty to i30             ; [#uses=1 type=i30]
  ret i30 %empty_15
}

; [#uses=0]
declare i3 @_ssdm_op_PartSelect.i3.i4.i32.i32(i4, i32, i32) nounwind readnone

; [#uses=2]
define weak i6 @_ssdm_op_BitConcatenate.i6.i3.i3(i3, i3) nounwind readnone {
entry:
  %empty = zext i3 %0 to i6                       ; [#uses=1 type=i6]
  %empty_16 = zext i3 %1 to i6                    ; [#uses=1 type=i6]
  %empty_17 = shl i6 %empty, 3                    ; [#uses=1 type=i6]
  %empty_18 = or i6 %empty_17, %empty_16          ; [#uses=1 type=i6]
  ret i6 %empty_18
}

!opencl.kernels = !{!0}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}
!axi4.master.portmap = !{!7}
!axi4.slave.bundlemap = !{!8, !9, !10}

!0 = metadata !{null, metadata !1, metadata !2, metadata !3, metadata !4, metadata !5, metadata !6}
!1 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1, i32 1}
!2 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none"}
!3 = metadata !{metadata !"kernel_arg_type", metadata !"int*", metadata !"int*", metadata !"int*"}
!4 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !""}
!5 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B", metadata !"result"}
!6 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!7 = metadata !{metadata !"gmem", metadata !"A", metadata !"READONLY", metadata !"B", metadata !"READONLY", metadata !"result", metadata !"WRITEONLY"}
!8 = metadata !{metadata !"A", metadata !""}
!9 = metadata !{metadata !"B", metadata !""}
!10 = metadata !{metadata !"result", metadata !""}
!11 = metadata !{i32 786689, metadata !12, metadata !"result", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!12 = metadata !{i32 786478, i32 0, metadata !13, metadata !"matrix_mult", metadata !"matrix_mult", metadata !"_Z11matrix_multPiS_S_", metadata !13, i32 4, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !18, i32 4} ; [ DW_TAG_subprogram ]
!13 = metadata !{i32 786473, metadata !"matrix_mult/matrix_mult.cpp", metadata !"/home/hakta/Documents", null} ; [ DW_TAG_file_type ]
!14 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
!15 = metadata !{null, metadata !16, metadata !16, metadata !16}
!16 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !17} ; [ DW_TAG_pointer_type ]
!17 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
!18 = metadata !{metadata !19}
!19 = metadata !{i32 786468}                      ; [ DW_TAG_base_type ]
!20 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 2048, i64 32, i32 0, i32 0, metadata !17, metadata !21, i32 0, i32 0} ; [ DW_TAG_array_type ]
!21 = metadata !{metadata !22}
!22 = metadata !{i32 786465, i64 0, i64 63}       ; [ DW_TAG_subrange_type ]
!23 = metadata !{i32 4, i32 46, metadata !12, null}
!24 = metadata !{i32 786689, metadata !12, metadata !"B", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!25 = metadata !{i32 4, i32 34, metadata !12, null}
!26 = metadata !{i32 786689, metadata !12, metadata !"A", null, i32 4, metadata !20, i32 0, i32 0} ; [ DW_TAG_arg_variable ]
!27 = metadata !{i32 4, i32 22, metadata !12, null}
!28 = metadata !{metadata !29}
!29 = metadata !{i32 0, i32 31, metadata !30}
!30 = metadata !{metadata !31, metadata !34, metadata !35}
!31 = metadata !{metadata !"A", metadata !32, metadata !"int", i32 0, i32 31}
!32 = metadata !{metadata !33}
!33 = metadata !{i32 0, i32 63, i32 1}
!34 = metadata !{metadata !"B", metadata !32, metadata !"int", i32 0, i32 31}
!35 = metadata !{metadata !"result", metadata !32, metadata !"int", i32 0, i32 31}
!36 = metadata !{i32 5, i32 1, metadata !37, null}
!37 = metadata !{i32 786443, metadata !12, i32 4, i32 59, metadata !13, i32 0} ; [ DW_TAG_lexical_block ]
!38 = metadata !{i32 786688, metadata !37, metadata !"tempA", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!39 = metadata !{i32 5, i32 6, metadata !37, null}
!40 = metadata !{i32 786688, metadata !37, metadata !"tempB", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!41 = metadata !{i32 5, i32 18, metadata !37, null}
!42 = metadata !{i32 786688, metadata !37, metadata !"tempResult", metadata !13, i32 5, metadata !20, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!43 = metadata !{i32 5, i32 30, metadata !37, null}
!44 = metadata !{i32 6, i32 2, metadata !37, null}
!45 = metadata !{i32 7, i32 2, metadata !37, null}
!46 = metadata !{i32 10, i32 16, metadata !47, null}
!47 = metadata !{i32 786443, metadata !37, i32 10, i32 2, metadata !13, i32 1} ; [ DW_TAG_lexical_block ]
!48 = metadata !{i32 10, i32 25, metadata !47, null}
!49 = metadata !{i32 18, i32 2, metadata !37, null}
!50 = metadata !{i32 11, i32 3, metadata !51, null}
!51 = metadata !{i32 786443, metadata !47, i32 11, i32 3, metadata !13, i32 2} ; [ DW_TAG_lexical_block ]
!52 = metadata !{i32 13, i32 4, metadata !53, null}
!53 = metadata !{i32 786443, metadata !54, i32 12, i32 31, metadata !13, i32 4} ; [ DW_TAG_lexical_block ]
!54 = metadata !{i32 786443, metadata !51, i32 12, i32 3, metadata !13, i32 3} ; [ DW_TAG_lexical_block ]
!55 = metadata !{i32 12, i32 17, metadata !54, null}
!56 = metadata !{i32 12, i32 26, metadata !54, null}
!57 = metadata !{i32 12, i32 32, metadata !53, null}
!58 = metadata !{i32 15, i32 18, metadata !59, null}
!59 = metadata !{i32 786443, metadata !53, i32 15, i32 4, metadata !13, i32 5} ; [ DW_TAG_lexical_block ]
!60 = metadata !{i32 16, i32 5, metadata !61, null}
!61 = metadata !{i32 786443, metadata !59, i32 16, i32 5, metadata !13, i32 6} ; [ DW_TAG_lexical_block ]
!62 = metadata !{i32 15, i32 27, metadata !59, null}
!63 = metadata !{i32 786688, metadata !59, metadata !"k", metadata !13, i32 15, metadata !17, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!64 = metadata !{i32 16, i32 61, metadata !53, null}
!65 = metadata !{i32 786688, metadata !54, metadata !"j", metadata !13, i32 12, metadata !17, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!66 = metadata !{i32 16, i32 61, metadata !54, null}
!67 = metadata !{i32 786688, metadata !47, metadata !"i", metadata !13, i32 10, metadata !17, i32 0, i32 0} ; [ DW_TAG_auto_variable ]
!68 = metadata !{i32 19, i32 1, metadata !37, null}