; ModuleID = '/home/hakta/Documents/matrix_mult/solution0/.autopilot/db/a.o.2.bc' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @memcpy_OC_tempB_OC_B.str = internal unnamed_addr constant [15 x i8] c"memcpy.tempB.B\00" ; [#uses=1 type=[15 x i8]*] @memcpy_OC_tempA_OC_A.str = internal unnamed_addr constant [15 x i8] c"memcpy.tempA.A\00" ; [#uses=1 type=[15 x i8]*] @memcpy_OC_result_OC_tempResult_OC_gep.str = internal unnamed_addr constant [29 x i8] c"memcpy.result.tempResult.gep\00" ; [#uses=1 type=[29 x i8]*] @matrix_mult.str = internal unnamed_addr constant [12 x i8] c"matrix_mult\00" ; [#uses=1 type=[12 x i8]*] @burstwrite_OC_region.str = internal unnamed_addr constant [18 x i8] c"burstwrite.region\00" ; [#uses=2 type=[18 x i8]*] @burstread_OC_region.str = internal unnamed_addr constant [17 x i8] c"burstread.region\00" ; [#uses=4 type=[17 x i8]*] @.str9 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*] @.str8 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*] @.str7 = internal unnamed_addr constant [1 x i8] zeroinitializer ; [#uses=1 type=[1 x i8]*] @.str6 = private unnamed_addr constant [28 x i8] c"matrix_mult__innermost_loop\00", align 1 ; [#uses=1 type=[28 x i8]*] @.str5 = private unnamed_addr constant [24 x i8] c"matrix_mult__inner_loop\00", align 1 ; [#uses=3 type=[24 x i8]*] @.str4 = private unnamed_addr constant [24 x i8] c"matrix_mult__outer_loop\00", align 1 ; [#uses=3 type=[24 x i8]*] @.str3 = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1 ; [#uses=1 type=[10 x i8]*] @.str2 = private unnamed_addr constant [6 x i8] c"slave\00", align 1 ; [#uses=3 type=[6 x i8]*] @.str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 ; [#uses=21 type=[1 x i8]*] @.str = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1 ; [#uses=3 type=[6 x i8]*] ; [#uses=0] define void @matrix_mult([64 x i32]* %A, [64 x i32]* %B, [64 x i32]* %result) nounwind uwtable { call void (...)* @_ssdm_op_SpecBitsMap([64 x i32]* %A) nounwind, !map !20 call void (...)* @_ssdm_op_SpecBitsMap([64 x i32]* %B) nounwind, !map !26 call void (...)* @_ssdm_op_SpecBitsMap([64 x i32]* %result) nounwind, !map !30 call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @matrix_mult.str) nounwind %tempA = alloca [64 x i32], align 16 ; [#uses=2 type=[64 x i32]*] %tempB = alloca [64 x i32], align 16 ; [#uses=2 type=[64 x i32]*] %tempResult = alloca [64 x i32], align 16 ; [#uses=2 type=[64 x i32]*] call void @llvm.dbg.value(metadata !{[64 x i32]* %A}, i64 0, metadata !34), !dbg !38 ; [debug line = 4:22] [debug variable = A] call void @llvm.dbg.value(metadata !{[64 x i32]* %B}, i64 0, metadata !39), !dbg !40 ; [debug line = 4:34] [debug variable = B] call void @llvm.dbg.value(metadata !{[64 x i32]* %result}, i64 0, metadata !41), !dbg !42 ; [debug line = 4:46] [debug variable = result] call void (...)* @_ssdm_op_SpecInterface([64 x i32]* %result, [6 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str2, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind call void (...)* @_ssdm_op_SpecInterface([64 x i32]* %B, [6 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str2, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @.str3, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 0, [1 x i8]* @.str1, [1 x i8]* @.str1, [1 x i8]* @.str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind, !dbg !43 ; [debug line = 5:1] call void (...)* @_ssdm_op_SpecInterface([64 x i32]* %A, [6 x i8]* @.str, i32 0, i32 0, [1 x i8]* @.str1, i32 0, i32 32, [1 x i8]* @.str1, [6 x i8]* @.str2, [1 x i8]* @.str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @.str1, [1 x i8]* @.str1) nounwind call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempA}, metadata !45), !dbg !46 ; [debug line = 5:6] [debug variable = tempA] call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempB}, metadata !47), !dbg !48 ; [debug line = 5:18] [debug variable = tempB] call void @llvm.dbg.declare(metadata !{[64 x i32]* %tempResult}, metadata !49), !dbg !50 ; [debug line = 5:30] [debug variable = tempResult] br label %burst.rd.header burst.rd.header: ; preds = %burst.rd.body, %0 %indvar = phi i7 [ 0, %0 ], [ %indvar.next, %burst.rd.body ] ; [#uses=3 type=i7] %exitcond3 = icmp eq i7 %indvar, -64 ; [#uses=1 type=i1] %1 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32] br i1 %exitcond3, label %burst.rd.header7.preheader, label %burst.rd.body burst.rd.header7.preheader: ; preds = %burst.rd.header br label %burst.rd.header7 burst.rd.body: ; preds = %burst.rd.header %burstread.rbegin = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region.str) nounwind ; [#uses=1 type=i32] %2 = call i32 (...)* @_ssdm_op_SpecBurst([64 x i32]* %A, i32 1, i32 64, i32 1) nounwind ; [#uses=0 type=i32] %3 = call i32 (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str7) nounwind ; [#uses=0 type=i32] call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempA_OC_A.str) %indvar.next = add i7 %indvar, 1 ; [#uses=1 type=i7] %tmp = zext i7 %indvar to i64, !dbg !51 ; [#uses=2 type=i64] [debug line = 6:2] %A.addr = getelementptr [64 x i32]* %A, i64 0, i64 %tmp, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2] %A.load = load i32* %A.addr, align 4, !dbg !51 ; [#uses=1 type=i32] [debug line = 6:2] %tempA.addr = getelementptr [64 x i32]* %tempA, i64 0, i64 %tmp, !dbg !51 ; [#uses=1 type=i32*] [debug line = 6:2] store i32 %A.load, i32* %tempA.addr, align 4, !dbg !51 ; [debug line = 6:2] %burstread.rend = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region.str, i32 %burstread.rbegin) nounwind ; [#uses=0 type=i32] br label %burst.rd.header burst.rd.header7: ; preds = %burst.rd.body8, %burst.rd.header7.preheader %indvar9 = phi i7 [ %indvar.next1, %burst.rd.body8 ], [ 0, %burst.rd.header7.preheader ] ; [#uses=3 type=i7] %exitcond4 = icmp eq i7 %indvar9, -64 ; [#uses=1 type=i1] %4 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 64, i64 64, i64 64) nounwind ; [#uses=0 type=i32] br i1 %exitcond4, label %burst.rd.end6.preheader, label %burst.rd.body8 burst.rd.end6.preheader: ; preds = %burst.rd.header7 br label %burst.rd.end6, !dbg !52 ; [debug line = 10:16] burst.rd.body8: ; preds = %burst.rd.header7 %burstread.rbegin1 = call i32 (...)* @_ssdm_op_SpecRegionBegin([17 x i8]* @burstread_OC_region.str) nounwind ; [#uses=1 type=i32] %5 = call i32 (...)* @_ssdm_op_SpecBurst([64 x i32]* %B, i32 1, i32 64, i32 1) nounwind ; [#uses=0 type=i32] %6 = call i32 (...)* @_ssdm_op_SpecPipeline(i32 1, i32 1, i32 1, i32 0, [1 x i8]* @.str8) nounwind ; [#uses=0 type=i32] call void (...)* @_ssdm_op_SpecLoopName([15 x i8]* @memcpy_OC_tempB_OC_B.str) %indvar.next1 = add i7 %indvar9, 1 ; [#uses=1 type=i7] %tmp.1 = zext i7 %indvar9 to i64, !dbg !54 ; [#uses=2 type=i64] [debug line = 7:2] %B.addr = getelementptr [64 x i32]* %B, i64 0, i64 %tmp.1, !dbg !54 ; [#uses=1 type=i32*] [debug line = 7:2] %B.load = load i32* %B.addr, align 4, !dbg !54 ; [#uses=1 type=i32] [debug line = 7:2] %tempB.addr = getelementptr [64 x i32]* %tempB, i64 0, i64 %tmp.1, !dbg !54 ; [#uses=1 type=i32*] [debug line = 7:2] store i32 %B.load, i32* %tempB.addr, align 4, !dbg !54 ; [debug line = 7:2] %burstread.rend14 = call i32 (...)* @_ssdm_op_SpecRegionEnd([17 x i8]* @burstread_OC_region.str, i32 %burstread.rbegin1) nounwind ; [#uses=0 type=i32] br label %burst.rd.header7 burst.rd.end6: ; preds = %17, %burst.rd.end6.preheader %i = phi i4 [ %i.1, %17 ], [ 0, %burst.rd.end6.preheader ] ; [#uses=3 type=i4] %i.cast4 = zext i4 %i to i6, !dbg !52 ; [#uses=1 type=i6] [debug line = 10:16] %exitcond2 = icmp eq i4 %i, -8, !dbg !52 ; [#uses=1 type=i1] [debug line = 10:16] %7 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8) nounwind ; [#uses=0 type=i32] br i1 %exitcond2, label %burst.wr.header.preheader, label %8, !dbg !52 ; [debug line = 10:16] burst.wr.header.preheader: ; preds = %burst.rd.end6 br label %burst.wr.header ;