Folder Path
/
MSc
/
HLS-FPGA
/
edge_detection_hw
/
edge_detection_hw.srcs
/
sources_1
/
bd
/
design_1
/
synth
/
0
directories
2
files
105 KiB
total
List
Grid
Name
Size
Modified
Up
design_1.hwdef
32 KiB
05/17/2022 08:16:50 PM +00:00
design_1.vhd
74 KiB
05/17/2022 08:16:50 PM +00:00