; ModuleID = '/home/hakta/Documents/edge_detection/solution2/.autopilot/db/a.o.2.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@convolution_str = internal unnamed_addr constant [12 x i8] c"convolution\00"
@RAM_1P_str = internal unnamed_addr constant [7 x i8] c"RAM_1P\00"
@p_str5 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str4 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str3 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@p_str = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1

declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

define void @convolution([10000 x i32]* %A, [100 x i32]* %B, [8281 x i32]* %C) nounwind uwtable {
  call void (...)* @_ssdm_op_SpecBitsMap([10000 x i32]* %A) nounwind, !map !7
  call void (...)* @_ssdm_op_SpecBitsMap([100 x i32]* %B) nounwind, !map !13
  call void (...)* @_ssdm_op_SpecBitsMap([8281 x i32]* %C) nounwind, !map !19
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @convolution_str) nounwind
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind
  %empty = call i32 (...)* @_ssdm_op_SpecMemCore([8281 x i32]* %C, [1 x i8]* @p_str5, [7 x i8]* @RAM_1P_str, [1 x i8]* @p_str5, i32 -1, [1 x i8]* @p_str5, [1 x i8]* @p_str5, [1 x i8]* @p_str5, [1 x i8]* @p_str5, [1 x i8]* @p_str5) nounwind
  call void (...)* @_ssdm_op_SpecInterface([8281 x i32]* %C, [10 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind
  %empty_2 = call i32 (...)* @_ssdm_op_SpecMemCore([100 x i32]* %B, [1 x i8]* @p_str4, [7 x i8]* @RAM_1P_str, [1 x i8]* @p_str4, i32 -1, [1 x i8]* @p_str4, [1 x i8]* @p_str4, [1 x i8]* @p_str4, [1 x i8]* @p_str4, [1 x i8]* @p_str4) nounwind
  call void (...)* @_ssdm_op_SpecInterface([100 x i32]* %B, [10 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind
  %empty_3 = call i32 (...)* @_ssdm_op_SpecMemCore([10000 x i32]* %A, [1 x i8]* @p_str3, [7 x i8]* @RAM_1P_str, [1 x i8]* @p_str3, i32 -1, [1 x i8]* @p_str3, [1 x i8]* @p_str3, [1 x i8]* @p_str3, [1 x i8]* @p_str3, [1 x i8]* @p_str3) nounwind
  call void (...)* @_ssdm_op_SpecInterface([10000 x i32]* %A, [10 x i8]* @p_str, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind
  br label %.loopexit1

.loopexit1.loopexit:                              ; preds = %.preheader4
  br label %.loopexit1

.loopexit1:                                       ; preds = %.loopexit1.loopexit, %0
  %i = phi i7 [ 0, %0 ], [ %i_1, %.loopexit1.loopexit ]
  %phi_mul = phi i14 [ 0, %0 ], [ %next_mul, %.loopexit1.loopexit ]
  %next_mul = add i14 %phi_mul, 91
  %exitcond3 = icmp eq i7 %i, -37
  %empty_4 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 91, i64 91, i64 91) nounwind
  %i_1 = add i7 %i, 1
  br i1 %exitcond3, label %3, label %.preheader4.preheader

.preheader4.preheader:                            ; preds = %.loopexit1
  br label %.preheader4

.preheader4.loopexit:                             ; preds = %.loopexit
  br label %.preheader4

.preheader4:                                      ; preds = %.preheader4.preheader, %.preheader4.loopexit
  %j = phi i7 [ %j_1, %.preheader4.loopexit ], [ 0, %.preheader4.preheader ]
  %j_cast5 = zext i7 %j to i14
  %exitcond2 = icmp eq i7 %j, -37
  %empty_5 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 91, i64 91, i64 91) nounwind
  %j_1 = add i7 %j, 1
  br i1 %exitcond2, label %.loopexit1.loopexit, label %1

; <label>:1                                       ; preds = %.preheader4
  %tmp_2 = add i14 %phi_mul, %j_cast5
  %tmp_3 = zext i14 %tmp_2 to i64
  %C_addr = getelementptr [8281 x i32]* %C, i64 0, i64 %tmp_3
  store i32 0, i32* %C_addr, align 4
  br label %.loopexit

.loopexit.loopexit:                               ; preds = %.preheader
  br label %.loopexit

.loopexit:                                        ; preds = %.loopexit.loopexit, %1
  %k = phi i4 [ 0, %1 ], [ %k_1, %.loopexit.loopexit ]
  %k_cast4 = zext i4 %k to i7
  %exitcond1 = icmp eq i4 %k, -6
  %empty_6 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 10, i64 10, i64 10) nounwind
  %k_1 = add i4 %k, 1
  br i1 %exitcond1, label %.preheader4.loopexit, label %.preheader.preheader

.preheader.preheader:                             ; preds = %.loopexit
  %tmp_5 = add i7 %k_cast4, %i
  %tmp_5_cast_cast = zext i7 %tmp_5 to i14
  %tmp_6 = mul i14 %tmp_5_cast_cast, 100
  %p_shl = call i7 @_ssdm_op_BitConcatenate.i7.i4.i3(i4 %k, i3 0)
  %p_shl8 = call i5 @_ssdm_op_BitConcatenate.i5.i4.i1(i4 %k, i1 false)
  br label %.preheader

.preheader:                                       ; preds = %2, %.preheader.preheader
  %l = phi i4 [ %l_1, %2 ], [ 0, %.preheader.preheader ]
  %l_cast3 = zext i4 %l to i14
  %l_cast = zext i4 %l to i5
  %exitcond = icmp eq i4 %l, -6
  %empty_7 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 10, i64 10, i64 10) nounwind
  %l_1 = add i4 %l, 1
  br i1 %exitcond, label %.loopexit.loopexit, label %2

; <label>:2                                       ; preds = %.preheader
  %tmp1 = add i14 %tmp_6, %l_cast3
  %tmp_s = add i14 %tmp1, %j_cast5
  %tmp_1 = zext i14 %tmp_s to i64
  %A_addr = getelementptr [10000 x i32]* %A, i64 0, i64 %tmp_1
  %A_load = load i32* %A_addr, align 4
  %tmp2 = add i5 %p_shl8, %l_cast
  %tmp2_cast = zext i5 %tmp2 to i7
  %tmp_4 = add i7 %tmp2_cast, %p_shl
  %tmp_8 = zext i7 %tmp_4 to i64
  %B_addr = getelementptr [100 x i32]* %B, i64 0, i64 %tmp_8
  %B_load = load i32* %B_addr, align 4
  %tmp_7 = mul nsw i32 %A_load, %B_load
  %C_load = load i32* %C_addr, align 4
  %tmp_9 = add nsw i32 %C_load, %tmp_7
  store i32 %tmp_9, i32* %C_addr, align 4
  br label %.preheader

; <label>:3                                       ; preds = %.loopexit1
  ret void
}

define weak void @_ssdm_op_SpecTopModule(...) {
entry:
  ret void
}

define weak i32 @_ssdm_op_SpecMemCore(...) {
entry:
  ret i32 0
}

define weak i32 @_ssdm_op_SpecLoopTripCount(...) {
entry:
  ret i32 0
}

define weak void @_ssdm_op_SpecInterface(...) nounwind {
entry:
  ret void
}

define weak void @_ssdm_op_SpecBitsMap(...) {
entry:
  ret void
}

define weak i7 @_ssdm_op_BitConcatenate.i7.i4.i3(i4, i3) nounwind readnone {
entry:
  %empty = zext i4 %0 to i7
  %empty_8 = zext i3 %1 to i7
  %empty_9 = shl i7 %empty, 3
  %empty_10 = or i7 %empty_9, %empty_8
  ret i7 %empty_10
}

define weak i5 @_ssdm_op_BitConcatenate.i5.i4.i1(i4, i1) nounwind readnone {
entry:
  %empty = zext i4 %0 to i5
  %empty_11 = zext i1 %1 to i5
  %empty_12 = shl i5 %empty, 1
  %empty_13 = or i5 %empty_12, %empty_11
  ret i5 %empty_13
}

!opencl.kernels = !{!0}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}

!0 = metadata !{null, metadata !1, metadata !2, metadata !3, metadata !4, metadata !5, metadata !6}
!1 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1, i32 1}
!2 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none"}
!3 = metadata !{metadata !"kernel_arg_type", metadata !"int*", metadata !"int*", metadata !"int*"}
!4 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !""}
!5 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B", metadata !"C"}
!6 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!7 = metadata !{metadata !8}
!8 = metadata !{i32 0, i32 31, metadata !9}
!9 = metadata !{metadata !10}
!10 = metadata !{metadata !"A", metadata !11, metadata !"int", i32 0, i32 31}
!11 = metadata !{metadata !12}
!12 = metadata !{i32 0, i32 9999, i32 1}
!13 = metadata !{metadata !14}
!14 = metadata !{i32 0, i32 31, metadata !15}
!15 = metadata !{metadata !16}
!16 = metadata !{metadata !"B", metadata !17, metadata !"int", i32 0, i32 31}
!17 = metadata !{metadata !18}
!18 = metadata !{i32 0, i32 99, i32 1}
!19 = metadata !{metadata !20}
!20 = metadata !{i32 0, i32 31, metadata !21}
!21 = metadata !{metadata !22}
!22 = metadata !{metadata !"C", metadata !23, metadata !"int", i32 0, i32 31}
!23 = metadata !{metadata !24}
!24 = metadata !{i32 0, i32 8280, i32 1}