; ModuleID = '/home/hakta/Documents/edge_detection/solution0/.autopilot/db/a.o.2.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@out_stream_OC_V_str = internal unnamed_addr constant [13 x i8] c"out_stream.V\00"
@out_array_offset_c_s = internal unnamed_addr constant [19 x i8] c"out_array_offset_c\00"
@mode7 = internal constant [10 x i8] c"s_axilite\00"
@mode = internal constant [10 x i8] c"s_axilite\00"
@in_stream_OC_V_str = internal unnamed_addr constant [12 x i8] c"in_stream.V\00"
@conv_stream_str = internal unnamed_addr constant [12 x i8] c"conv_stream\00"
@conv_rows_conv_cols_s = internal unnamed_addr constant [20 x i8] c"conv_rows_conv_cols\00"
@bundle8 = internal constant [1 x i8] zeroinitializer
@bundle = internal constant [1 x i8] zeroinitializer
@ap_fifo_str = internal unnamed_addr constant [8 x i8] c"ap_fifo\00"
@p_str9 = private unnamed_addr constant [9 x i8] c"in_array\00", align 1
@p_str8 = private unnamed_addr constant [6 x i8] c"slave\00", align 1
@p_str7 = private unnamed_addr constant [10 x i8] c"out_array\00", align 1
@p_str6 = private unnamed_addr constant [6 x i8] c"m_axi\00", align 1
@p_str5 = private unnamed_addr constant [10 x i8] c"conv_cols\00", align 1
@p_str49 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str48 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str47 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str46 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str45 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str44 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str43 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str42 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str41 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str40 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str39 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str38 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str37 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str36 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str34 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str33 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str32 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str31 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str30 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str29 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str27 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str26 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str25 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str24 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str23 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str22 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str21 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str20 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str2 = private unnamed_addr constant [11 x i8] c"write_loop\00", align 1
@p_str19 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str18 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str17 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str16 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str15 = internal unnamed_addr constant [1 x i8] zeroinitializer
@p_str10 = private unnamed_addr constant [10 x i8] c"s_axilite\00", align 1
@p_str1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@p_str = private unnamed_addr constant [10 x i8] c"read_loop\00", align 1

define internal fastcc void @write_pixel(float* %out_stream_V, float* %out_array, i32* nocapture %out_array_offset) {
entry:
  call void (...)* @_ssdm_op_SpecInterface(float* %out_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str44, i32 0, i32 0, [1 x i8]* @p_str45, [1 x i8]* @p_str46, [1 x i8]* @p_str47, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str48, [1 x i8]* @p_str49)
  call void (...)* @_ssdm_op_SpecInterface(float* %out_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [10 x i8]* @p_str7, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32* %out_array_offset, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str29, i32 0, i32 0, [1 x i8]* @p_str30, [1 x i8]* @p_str31, [1 x i8]* @p_str32, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str33, [1 x i8]* @p_str34)
  %out_array_offset_rea = call i32 @_ssdm_op_Read.ap_fifo.i32P(i32* %out_array_offset)
  %out_array_offset1_i = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %out_array_offset_rea, i32 2, i32 31)
  call void (...)* @_ssdm_op_SpecInterface(float* %out_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str44, i32 0, i32 0, [1 x i8]* @p_str45, [1 x i8]* @p_str46, [1 x i8]* @p_str47, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str48, [1 x i8]* @p_str49)
  call void (...)* @_ssdm_op_SpecInterface(float* %out_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [10 x i8]* @p_str7, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  %sext_i = zext i30 %out_array_offset1_i to i64
  %out_array_addr = getelementptr float* %out_array, i64 %sext_i
  %out_array_addr_i_wr_s = call i1 @_ssdm_op_WriteReq.m_axi.floatP(float* %out_array_addr, i32 324)
  br label %0

; <label>:0                                       ; preds = %1, %entry
  %i_i = phi i9 [ 0, %entry ], [ %i, %1 ]
  %exitcond_i = icmp eq i9 %i_i, -188
  %i = add i9 %i_i, 1
  br i1 %exitcond_i, label %.exit, label %1

; <label>:1                                       ; preds = %0
  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 324, i64 324, i64 324)
  call void (...)* @_ssdm_op_SpecLoopName([11 x i8]* @p_str2) nounwind
  %tmp_2_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([11 x i8]* @p_str2)
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind
  %tmp = call float @_ssdm_op_Read.ap_fifo.volatile.floatP(float* %out_stream_V)
  call void @_ssdm_op_Write.m_axi.floatP(float* %out_array_addr, float %tmp, i4 -1)
  %empty_9 = call i32 (...)* @_ssdm_op_SpecRegionEnd([11 x i8]* @p_str2, i32 %tmp_2_i)
  br label %0

.exit:                                            ; preds = %0
  %out_array_addr_i_wr_1 = call i1 @_ssdm_op_WriteResp.m_axi.floatP(float* %out_array_addr)
  ret void
}

define internal fastcc void @read_pixel13(float* %in_stream_V, float* %in_array, i32 %in_array_offset, i32 %out_array_offset, i32* %out_array_offset_out) {
entry:
  call void (...)* @_ssdm_op_SpecInterface(float* %in_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str37, i32 0, i32 0, [1 x i8]* @p_str38, [1 x i8]* @p_str39, [1 x i8]* @p_str40, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str41, [1 x i8]* @p_str42)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str37, i32 0, i32 0, [1 x i8]* @p_str38, [1 x i8]* @p_str39, [1 x i8]* @p_str40, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str41, [1 x i8]* @p_str42)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [9 x i8]* @p_str9, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [9 x i8]* @p_str9, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32* %out_array_offset_out, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str15, i32 0, i32 0, [1 x i8]* @p_str16, [1 x i8]* @p_str17, [1 x i8]* @p_str18, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str19, [1 x i8]* @p_str20)
  %out_array_offset_rea = call i32 @_ssdm_op_Read.ap_auto.i32(i32 %out_array_offset)
  %in_array_offset_read = call i32 @_ssdm_op_Read.ap_auto.i32(i32 %in_array_offset)
  call void @_ssdm_op_Write.ap_fifo.i32P(i32* %out_array_offset_out, i32 %out_array_offset_rea)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str37, i32 0, i32 0, [1 x i8]* @p_str38, [1 x i8]* @p_str39, [1 x i8]* @p_str40, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str41, [1 x i8]* @p_str42)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [9 x i8]* @p_str9, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  %in_array_offset1_i_i = call i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32 %in_array_offset_read, i32 2, i32 31)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str37, i32 0, i32 0, [1 x i8]* @p_str38, [1 x i8]* @p_str39, [1 x i8]* @p_str40, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str41, [1 x i8]* @p_str42)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [9 x i8]* @p_str9, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  %sext_i_i = zext i30 %in_array_offset1_i_i to i64
  %in_array_addr = getelementptr float* %in_array, i64 %sext_i_i
  %in_array_addr_i_i_rd = call i1 @_ssdm_op_ReadReq.m_axi.floatP(float* %in_array_addr, i32 400)
  br label %0

; <label>:0                                       ; preds = %1, %entry
  %i_i_i = phi i9 [ 0, %entry ], [ %i, %1 ]
  %exitcond_i_i = icmp eq i9 %i_i_i, -112
  %i = add i9 %i_i_i, 1
  br i1 %exitcond_i_i, label %.exit, label %1

; <label>:1                                       ; preds = %0
  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 400, i64 400, i64 400)
  call void (...)* @_ssdm_op_SpecLoopName([10 x i8]* @p_str) nounwind
  %tmp_3_i_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([10 x i8]* @p_str)
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind
  %temp = call float @_ssdm_op_Read.m_axi.floatP(float* %in_array_addr)
  call void @_ssdm_op_Write.ap_fifo.volatile.floatP(float* %in_stream_V, float %temp)
  %empty_10 = call i32 (...)* @_ssdm_op_SpecRegionEnd([10 x i8]* @p_str, i32 %tmp_3_i_i)
  br label %0

.exit:                                            ; preds = %0
  ret void
}

declare i5 @llvm.part.select.i5(i5, i32, i32) nounwind readnone

declare i32 @llvm.part.select.i32(i32, i32, i32) nounwind readnone

declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone

declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone

define internal fastcc void @convolve(float* %in_stream_V, float* %out_stream_V) {
  %crop_0_0 = alloca float
  %crop_0_1 = alloca float
  %crop_1_0 = alloca float
  %crop_1_1 = alloca float
  %crop_2_0 = alloca float
  %crop_2_1 = alloca float
  call void (...)* @_ssdm_op_SpecInterface(float* %out_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str44, i32 0, i32 0, [1 x i8]* @p_str45, [1 x i8]* @p_str46, [1 x i8]* @p_str47, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str48, [1 x i8]* @p_str49)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str37, i32 0, i32 0, [1 x i8]* @p_str38, [1 x i8]* @p_str39, [1 x i8]* @p_str40, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str41, [1 x i8]* @p_str42)
  %temp_array_0_assign = alloca [20 x float], align 4
  %temp_array_1_assign = alloca [20 x float], align 4
  br label %1

; <label>:1                                       ; preds = %0, %._crit_edge
  %indvar_flatten = phi i9 [ 0, %0 ], [ %indvar_flatten_next, %._crit_edge ]
  %i = phi i5 [ 0, %0 ], [ %i_mid2, %._crit_edge ]
  %pos_y_assign = phi i5 [ 0, %0 ], [ %j, %._crit_edge ]
  %crop_0_0_load = load float* %crop_0_0
  %crop_0_1_load_1 = load float* %crop_0_1
  %crop_1_0_load = load float* %crop_1_0
  %crop_1_1_load_1 = load float* %crop_1_1
  %crop_2_0_load = load float* %crop_2_0
  %crop_2_1_load_1 = load float* %crop_2_1
  %exitcond_flatten = icmp eq i9 %indvar_flatten, -112
  %indvar_flatten_next = add i9 %indvar_flatten, 1
  store float %crop_2_1_load_1, float* %crop_2_0
  store float %crop_1_1_load_1, float* %crop_1_0
  store float %crop_0_1_load_1, float* %crop_0_0
  br i1 %exitcond_flatten, label %3, label %.reset

; <label>:2                                       ; preds = %.reset
  call void @_ssdm_op_Write.ap_fifo.volatile.floatP(float* %out_stream_V, float %tmp_4)
  br label %._crit_edge

._crit_edge:                                      ; preds = %2, %.reset
  %empty = call i32 (...)* @_ssdm_op_SpecRegionEnd([10 x i8]* @p_str5, i32 %tmp_6)
  %j = add i5 %pos_y_assign_mid2, 1
  br label %1

.reset:                                           ; preds = %1
  %crop_0_1_load = load float* %crop_0_1
  %crop_1_1_load = load float* %crop_1_1
  %crop_2_1_load = load float* %crop_2_1
  call void (...)* @_ssdm_op_SpecLoopName([20 x i8]* @conv_rows_conv_cols_s)
  %empty_11 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 400, i64 400, i64 400)
  %exitcond = icmp eq i5 %pos_y_assign, -12
  %pos_y_assign_mid2 = select i1 %exitcond, i5 0, i5 %pos_y_assign
  %i_s = add i5 %i, 1
  %tmp = call i4 @_ssdm_op_PartSelect.i4.i5.i32.i32(i5 %i_s, i32 1, i32 4)
  %icmp = icmp ne i4 %tmp, 0
  %tmp_1 = call i4 @_ssdm_op_PartSelect.i4.i5.i32.i32(i5 %i, i32 1, i32 4)
  %icmp1 = icmp ne i4 %tmp_1, 0
  %tmp_mid2 = select i1 %exitcond, i1 %icmp, i1 %icmp1
  %i_mid2 = select i1 %exitcond, i5 %i_s, i5 %i
  call void (...)* @_ssdm_op_SpecLoopName([10 x i8]* @p_str5) nounwind
  %tmp_6 = call i32 (...)* @_ssdm_op_SpecRegionBegin([10 x i8]* @p_str5)
  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind
  %tmp_5 = call float @_ssdm_op_Read.ap_fifo.volatile.floatP(float* %in_stream_V)
  %tmp_i = zext i5 %pos_y_assign_mid2 to i64
  %temp_array_0_assign_1 = getelementptr [20 x float]* %temp_array_0_assign, i64 0, i64 %tmp_i
  %crop_0_2 = load float* %temp_array_0_assign_1, align 4
  %temp_array_1_assign_1 = getelementptr [20 x float]* %temp_array_1_assign, i64 0, i64 %tmp_i
  %crop_1_2 = load float* %temp_array_1_assign_1, align 4
  store float %crop_1_2, float* %temp_array_0_assign_1, align 4
  store float %tmp_5, float* %temp_array_1_assign_1, align 4
  %tmp_4_0_i = fmul float %crop_0_0_load, 0.000000e+00
  %result_2_0_i = fadd float %tmp_4_0_i, 0.000000e+00
  %result_2_0_1_i = fadd float %result_2_0_i, %crop_0_1_load
  %tmp_4_0_2_i = fmul float %crop_0_2, 0.000000e+00
  %result_2_0_2_i = fadd float %result_2_0_1_i, %tmp_4_0_2_i
  %result_2_1_i = fadd float %result_2_0_2_i, %crop_1_0_load
  %tmp_4_1_1_i = fmul float %crop_1_1_load, -4.000000e+00
  %result_2_1_1_i = fadd float %result_2_1_i, %tmp_4_1_1_i
  %result_2_1_2_i = fadd float %result_2_1_1_i, %crop_1_2
  %tmp_4_2_i = fmul float %crop_2_0_load, 0.000000e+00
  %result_2_2_i = fadd float %result_2_1_2_i, %tmp_4_2_i
  %result_2_2_1_i = fadd float %result_2_2_i, %crop_2_1_load
  %tmp_4_2_2_i = fmul float %tmp_5, 0.000000e+00
  %tmp_4 = fadd float %result_2_2_1_i, %tmp_4_2_2_i
  %tmp_3 = call i4 @_ssdm_op_PartSelect.i4.i5.i32.i32(i5 %pos_y_assign_mid2, i32 1, i32 4)
  %icmp2 = icmp ne i4 %tmp_3, 0
  %or_cond = and i1 %tmp_mid2, %icmp2
  store float %tmp_5, float* %crop_2_1
  store float %crop_1_2, float* %crop_1_1
  store float %crop_0_2, float* %crop_0_1
  br i1 %or_cond, label %2, label %._crit_edge

; <label>:3                                       ; preds = %1
  ret void
}

define void @conv_stream(float* %in_array, float* %out_array, i32 %in_array_offset, i32 %out_array_offset) {
  %out_array_offset_rea = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %out_array_offset)
  %in_array_offset_read = call i32 @_ssdm_op_Read.s_axilite.i32(i32 %in_array_offset)
  %out_array_offset_c = alloca i32, align 4
  call void (...)* @_ssdm_op_SpecBitsMap(float* %out_array), !map !47
  call void (...)* @_ssdm_op_SpecBitsMap(float* %in_array), !map !53
  call void (...)* @_ssdm_op_SpecDataflowPipeline(i32 -1, [1 x i8]* @p_str1) nounwind
  call void (...)* @_ssdm_op_SpecTopModule([12 x i8]* @conv_stream_str) nounwind
  %in_stream_V = alloca float, align 4
  %empty = call i32 (...)* @_ssdm_op_SpecChannel([12 x i8]* @in_stream_OC_V_str, i32 1, [1 x i8]* @p_str36, [1 x i8]* @p_str36, i32 32, i32 32, float* %in_stream_V, float* %in_stream_V) nounwind
  call void (...)* @_ssdm_op_SpecInterface(float* %in_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str37, i32 0, i32 0, [1 x i8]* @p_str38, [1 x i8]* @p_str39, [1 x i8]* @p_str40, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str41, [1 x i8]* @p_str42)
  %out_stream_V = alloca float, align 4
  %empty_12 = call i32 (...)* @_ssdm_op_SpecChannel([13 x i8]* @out_stream_OC_V_str, i32 1, [1 x i8]* @p_str43, [1 x i8]* @p_str43, i32 32, i32 32, float* %out_stream_V, float* %out_stream_V) nounwind
  call void (...)* @_ssdm_op_SpecInterface(float* %out_stream_V, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str44, i32 0, i32 0, [1 x i8]* @p_str45, [1 x i8]* @p_str46, [1 x i8]* @p_str47, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str48, [1 x i8]* @p_str49)
  call void (...)* @_ssdm_op_SpecInterface(float* %out_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [10 x i8]* @p_str7, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %out_array_offset, [10 x i8]* @mode7, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [1 x i8]* @bundle8, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(float* %in_array, [6 x i8]* @p_str6, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [9 x i8]* @p_str9, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 %in_array_offset, [10 x i8]* @mode, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 400, [1 x i8]* @bundle, [6 x i8]* @p_str8, [1 x i8]* @p_str1, i32 16, i32 16, i32 16, i32 16, [1 x i8]* @p_str1, [1 x i8]* @p_str1)
  call void (...)* @_ssdm_op_SpecInterface(i32 0, [10 x i8]* @p_str10, i32 0, i32 0, [1 x i8]* @p_str1, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1, [1 x i8]* @p_str1, i32 0, i32 0, i32 0, i32 0, [1 x i8]* @p_str1, [1 x i8]* @p_str1) nounwind
  %empty_13 = call i32 (...)* @_ssdm_op_SpecChannel([19 x i8]* @out_array_offset_c_s, i32 1, [1 x i8]* @p_str21, [1 x i8]* @p_str21, i32 2, i32 0, i32* %out_array_offset_c, i32* %out_array_offset_c)
  call void (...)* @_ssdm_op_SpecInterface(i32* %out_array_offset_c, [8 x i8]* @ap_fifo_str, i32 0, i32 0, [1 x i8]* @p_str22, i32 0, i32 0, [1 x i8]* @p_str23, [1 x i8]* @p_str24, [1 x i8]* @p_str25, i32 2, i32 2, i32 16, i32 16, [1 x i8]* @p_str26, [1 x i8]* @p_str27)
  call fastcc void @read_pixel13(float* %in_stream_V, float* %in_array, i32 %in_array_offset_read, i32 %out_array_offset_rea, i32* %out_array_offset_c)
  call fastcc void @convolve(float* %in_stream_V, float* %out_stream_V) nounwind
  call fastcc void @write_pixel(float* %out_stream_V, float* %out_array, i32* nocapture %out_array_offset_c)
  ret void
}

define weak i1 @_ssdm_op_WriteResp.m_axi.floatP(float*) {
entry:
  ret i1 true
}

define weak i1 @_ssdm_op_WriteReq.m_axi.floatP(float*, i32) {
entry:
  ret i1 true
}

define weak void @_ssdm_op_Write.m_axi.floatP(float*, float, i4) {
entry:
  ret void
}

define weak void @_ssdm_op_Write.ap_fifo.volatile.floatP(float*, float) {
entry:
  %empty = call float @_autotb_FifoWrite_float(float* %0, float %1)
  ret void
}

define weak void @_ssdm_op_Write.ap_fifo.i32P(i32*, i32) {
entry:
  %empty = call i32 @_autotb_FifoWrite_i32(i32* %0, i32 %1)
  ret void
}

define weak void @_ssdm_op_SpecTopModule(...) {
entry:
  ret void
}

define weak i32 @_ssdm_op_SpecRegionEnd(...) {
entry:
  ret i32 0
}

define weak i32 @_ssdm_op_SpecRegionBegin(...) {
entry:
  ret i32 0
}

define weak void @_ssdm_op_SpecPipeline(...) nounwind {
entry:
  ret void
}

define weak i32 @_ssdm_op_SpecLoopTripCount(...) {
entry:
  ret i32 0
}

define weak void @_ssdm_op_SpecLoopName(...) nounwind {
entry:
  ret void
}

define weak void @_ssdm_op_SpecInterface(...) nounwind {
entry:
  ret void
}

define weak void @_ssdm_op_SpecDataflowPipeline(...) nounwind {
entry:
  ret void
}

define weak i32 @_ssdm_op_SpecChannel(...) {
entry:
  ret i32 0
}

define weak void @_ssdm_op_SpecBitsMap(...) {
entry:
  ret void
}

define weak i1 @_ssdm_op_ReadReq.m_axi.floatP(float*, i32) {
entry:
  ret i1 true
}

define weak i32 @_ssdm_op_Read.s_axilite.i32(i32) {
entry:
  ret i32 %0
}

define weak float @_ssdm_op_Read.m_axi.floatP(float*) {
entry:
  %empty = load float* %0
  ret float %empty
}

define weak float @_ssdm_op_Read.ap_fifo.volatile.floatP(float*) {
entry:
  %empty = call float @_autotb_FifoRead_float(float* %0)
  ret float %empty
}

define weak i32 @_ssdm_op_Read.ap_fifo.i32P(i32*) {
entry:
  %empty = call i32 @_autotb_FifoRead_i32(i32* %0)
  ret i32 %empty
}

define weak i32 @_ssdm_op_Read.ap_auto.i32(i32) {
entry:
  ret i32 %0
}

define weak i4 @_ssdm_op_PartSelect.i4.i5.i32.i32(i5, i32, i32) nounwind readnone {
entry:
  %empty = call i5 @llvm.part.select.i5(i5 %0, i32 %1, i32 %2)
  %empty_14 = trunc i5 %empty to i4
  ret i4 %empty_14
}

define weak i30 @_ssdm_op_PartSelect.i30.i32.i32.i32(i32, i32, i32) nounwind readnone {
entry:
  %empty = call i32 @llvm.part.select.i32(i32 %0, i32 %1, i32 %2)
  %empty_15 = trunc i32 %empty to i30
  ret i30 %empty_15
}

declare i32 @_autotb_FifoWrite_i32(i32*, i32)

declare float @_autotb_FifoWrite_float(float*, float)

declare i32 @_autotb_FifoRead_i32(i32*)

declare float @_autotb_FifoRead_float(float*)

!opencl.kernels = !{!0, !7, !12, !18, !21, !25, !28, !28, !34, !40}
!hls.encrypted.func = !{}
!llvm.map.gv = !{}
!axi4.master.portmap = !{!43, !44}
!axi4.slave.bundlemap = !{!45, !46}

!0 = metadata !{null, metadata !1, metadata !2, metadata !3, metadata !4, metadata !5, metadata !6}
!1 = metadata !{metadata !"kernel_arg_addr_space", i32 1, i32 1}
!2 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none"}
!3 = metadata !{metadata !"kernel_arg_type", metadata !"T_input [3]*", metadata !"const T_input [3]*"}
!4 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"const"}
!5 = metadata !{metadata !"kernel_arg_name", metadata !"A", metadata !"B"}
!6 = metadata !{metadata !"reqd_work_group_size", i32 1, i32 1, i32 1}
!7 = metadata !{null, metadata !8, metadata !2, metadata !9, metadata !10, metadata !11, metadata !6}
!8 = metadata !{metadata !"kernel_arg_addr_space", i32 0, i32 1}
!9 = metadata !{metadata !"kernel_arg_type", metadata !"hls::stream<T_input> &", metadata !"T_input*"}
!10 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !""}
!11 = metadata !{metadata !"kernel_arg_name", metadata !"in_stream", metadata !"in_array"}
!12 = metadata !{null, metadata !13, metadata !14, metadata !15, metadata !16, metadata !17, metadata !6}
!13 = metadata !{metadata !"kernel_arg_addr_space", i32 0, i32 1, i32 1, i32 0}
!14 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none", metadata !"none", metadata !"none", metadata !"none"}
!15 = metadata !{metadata !"kernel_arg_type", metadata !"T_input", metadata !"T_input [20]*", metadata !"T_input [3]*", metadata !"int"}
!16 = metadata !{metadata !"kernel_arg_type_qual", metadata !"", metadata !"", metadata !"", metadata !""}
!17 = metadata !{metadata !"kernel_arg_name", metadata !"new_data", metadata !"temp_array", metadata !"crop", metadata !"pos_y"}
!18 = metadata !{null, metadata !8, metadata !2, metadata !19, metadata !10, metadata !20, metadata !6}
!19 = metadata !{metadata !"kernel_arg_type", metadata !"hls::stream<T_output> &", metadata !"T_output*"}
!20 = metadata !{metadata !"kernel_arg_name", metadata !"out_stream", metadata !"out_array"}
!21 = metadata !{null, metadata !22, metadata !2, metadata !23, metadata !10, metadata !24, metadata !6}
!22 = metadata !{metadata !"kernel_arg_addr_space", i32 0, i32 0}
!23 = metadata !{metadata !"kernel_arg_type", metadata !"hls::stream<T_input> &", metadata !"hls::stream<T_output> &"}
!24 = metadata !{metadata !"kernel_arg_name", metadata !"in_stream", metadata !"out_stream"}
!25 = metadata !{null, metadata !1, metadata !2, metadata !26, metadata !10, metadata !27, metadata !6}
!26 = metadata !{metadata !"kernel_arg_type", metadata !"T_input*", metadata !"T_output*"}
!27 = metadata !{metadata !"kernel_arg_name", metadata !"in_array", metadata !"out_array"}
!28 = metadata !{null, metadata !29, metadata !30, metadata !31, metadata !32, metadata !33, metadata !6}
!29 = metadata !{metadata !"kernel_arg_addr_space"}
!30 = metadata !{metadata !"kernel_arg_access_qual"}
!31 = metadata !{metadata !"kernel_arg_type"}
!32 = metadata !{metadata !"kernel_arg_type_qual"}
!33 = metadata !{metadata !"kernel_arg_name"}
!34 = metadata !{null, metadata !35, metadata !36, metadata !37, metadata !38, metadata !39, metadata !6}
!35 = metadata !{metadata !"kernel_arg_addr_space", i32 0}
!36 = metadata !{metadata !"kernel_arg_access_qual", metadata !"none"}
!37 = metadata !{metadata !"kernel_arg_type", metadata !"float &"}
!38 = metadata !{metadata !"kernel_arg_type_qual", metadata !""}
!39 = metadata !{metadata !"kernel_arg_name", metadata !"dout"}
!40 = metadata !{null, metadata !35, metadata !36, metadata !41, metadata !38, metadata !42, metadata !6}
!41 = metadata !{metadata !"kernel_arg_type", metadata !"const float &"}
!42 = metadata !{metadata !"kernel_arg_name", metadata !"din"}
!43 = metadata !{metadata !"in_array", metadata !"in_array_offset", metadata !"READONLY"}
!44 = metadata !{metadata !"out_array", metadata !"out_array_offset", metadata !"WRITEONLY"}
!45 = metadata !{metadata !"in_array", metadata !""}
!46 = metadata !{metadata !"out_array", metadata !""}
!47 = metadata !{metadata !48}
!48 = metadata !{i32 0, i32 31, metadata !49}
!49 = metadata !{metadata !50}
!50 = metadata !{metadata !"out_array", metadata !51, metadata !"float", i32 0, i32 31}
!51 = metadata !{metadata !52}
!52 = metadata !{i32 0, i32 323, i32 1}
!53 = metadata !{metadata !54}
!54 = metadata !{i32 0, i32 31, metadata !55}
!55 = metadata !{metadata !56}
!56 = metadata !{metadata !"in_array", metadata !57, metadata !"float", i32 0, i32 31}
!57 = metadata !{metadata !58}
!58 = metadata !{i32 0, i32 399, i32 1}