Folder Path
/
MSc
/
HLS-FPGA
/
edge_detection
/
axi_port_only
/
sim
/
vhdl
/
xsim.dir
/
4
directories
0
files
0 B
total
List
Grid
Name
Size
Modified
Up
conv_stream.wdb/
—
05/17/2022 08:16:10 PM +00:00
conv_stream/
—
05/17/2022 08:16:10 PM +00:00
work/
—
05/17/2022 08:16:11 PM +00:00
xil_defaultlib/
—
05/17/2022 08:16:11 PM +00:00