Folder Path
/
7-szemeszter
/
FPGA
/
vga
/
vga.sim
/
sim_1
/
behav
/
xsim.dir
/
xil_defaultlib
/
0
directories
6
files
23 KiB
total
List
Grid
Name
Size
Modified
Up
clk_gen_tb.vdb
3.0 KiB
05/17/2022 08:12:57 PM +00:00
clk_gen_test.vdb
8.7 KiB
05/17/2022 08:12:57 PM +00:00
clk_wiz_0.sdb
1.1 KiB
05/17/2022 08:12:57 PM +00:00
clk_wiz_0_clk_wiz.sdb
5.4 KiB
05/17/2022 08:12:57 PM +00:00
glbl.sdb
4.2 KiB
05/17/2022 08:12:57 PM +00:00
xil_defaultlib.rlx
590 B
05/17/2022 08:12:57 PM +00:00