Folder Path

/7-szemeszter/FPGA/std_adder/std_adder.sim/sim_1/behav/xsim.dir/xil_defaultlib/

0 directories 3 files 5.9 KiB total
List Grid
Name
Size Modified
Up
std_adder.vdb
2.2 KiB
std_adder_tb.vdb
3.4 KiB
xil_defaultlib.rlx
258 B