#----------------------------------------------------------- # Vivado v2016.4 (64-bit) # SW Build 1733598 on Wed Dec 14 22:35:42 MST 2016 # IP Build 1731160 on Wed Dec 14 23:47:21 MST 2016 # Start of session at: Fri Sep 15 11:41:39 2017 # Process ID: 5040 # Current directory: /home/hakta/myand2/myand2.runs/synth_1 # Command line: vivado -log myand2.vds -product Vivado -mode batch -messageDb vivado.pb -notrace -source myand2.tcl # Log file: /home/hakta/myand2/myand2.runs/synth_1/myand2.vds # Journal file: /home/hakta/myand2/myand2.runs/synth_1/vivado.jou #----------------------------------------------------------- source myand2.tcl -notrace Command: synth_design -top myand2 -part xc7z020clg484-1 Starting synth_design Attempting to get a license for feature 'Synthesis' and/or device 'xc7z020' INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7z020' INFO: Launching helper process for spawning children vivado processes INFO: Helper process launched with PID 5045 --------------------------------------------------------------------------------- Starting RTL Elaboration : Time (s): cpu = 00:00:06 ; elapsed = 00:00:06 . Memory (MB): peak = 1074.969 ; gain = 147.082 ; free physical = 15597 ; free virtual = 17499 --------------------------------------------------------------------------------- INFO: [Synth 8-638] synthesizing module 'myand2' [/home/hakta/myand2/myand2.srcs/sources_1/new/myand2.vhd:40] INFO: [Synth 8-256] done synthesizing module 'myand2' (1#1) [/home/hakta/myand2/myand2.srcs/sources_1/new/myand2.vhd:40] --------------------------------------------------------------------------------- Finished RTL Elaboration : Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 1115.445 ; gain = 187.559 ; free physical = 15553 ; free virtual = 17457 --------------------------------------------------------------------------------- Report Check Netlist: +------+------------------+-------+---------+-------+------------------+ | |Item |Errors |Warnings |Status |Description | +------+------------------+-------+---------+-------+------------------+ |1 |multi_driven_nets | 0| 0|Passed |Multi driven nets | +------+------------------+-------+---------+-------+------------------+ --------------------------------------------------------------------------------- Finished RTL Optimization Phase 1 : Time (s): cpu = 00:00:07 ; elapsed = 00:00:07 . Memory (MB): peak = 1115.445 ; gain = 187.559 ; free physical = 15553 ; free virtual = 17457 --------------------------------------------------------------------------------- INFO: [Device 21-403] Loading part xc7z020clg484-1 INFO: [Project 1-570] Preparing netlist for logic optimization Processing XDC Constraints Initializing timing engine Parsing XDC File [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc] WARNING: [Vivado 12-584] No ports matched '[get_ports -of_objects [get_iobanks 33]]'. [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc:22] WARNING: [Vivado 12-584] No ports matched '[get_ports -of_objects [get_iobanks 34]]'. [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc:27] WARNING: [Vivado 12-584] No ports matched '[get_ports -of_objects [get_iobanks 35]]'. [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc:32] WARNING: [Vivado 12-584] No ports matched '[get_ports -of_objects [get_iobanks 13]]'. [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc:35] Finished Parsing XDC File [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc] INFO: [Project 1-236] Implementation specific constraints were found while reading constraint file [/home/hakta/myand2/myand2.srcs/constrs_1/new/myand2.xdc]. These constraints will be ignored for synthesis but will be used in implementation. Impacted constraints are listed in the file [.Xil/myand2_propImpl.xdc]. Resolution: To avoid this warning, move constraints listed in [.Xil/myand2_propImpl.xdc] to another XDC file and exclude this new file from synthesis with the used_in_synthesis property (File Properties dialog in GUI) and re-run elaboration/synthesis. Completed Processing XDC Constraints INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. Constraint Validation Runtime : Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 1370.762 ; gain = 0.000 ; free physical = 15314 ; free virtual = 17266 --------------------------------------------------------------------------------- Finished Constraint Validation : Time (s): cpu = 00:00:15 ; elapsed = 00:00:17 . Memory (MB): peak = 1370.766 ; gain = 442.879 ; free physical = 15314 ; free virtual = 17265 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Loading Part and Timing Information --------------------------------------------------------------------------------- Loading part: xc7z020clg484-1 --------------------------------------------------------------------------------- Finished Loading Part and Timing Information : Time (s): cpu = 00:00:15 ; elapsed = 00:00:17 . Memory (MB): peak = 1370.766 ; gain = 442.879 ; free physical = 15314 ; free virtual = 17264 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying 'set_property' XDC Constraints --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished applying 'set_property' XDC Constraints : Time (s): cpu = 00:00:15 ; elapsed = 00:00:17 . Memory (MB): peak = 1370.766 ; gain = 442.879 ; free physical = 15314 ; free virtual = 17264 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished RTL Optimization Phase 2 : Time (s): cpu = 00:00:15 ; elapsed = 00:00:17 . Memory (MB): peak = 1370.766 ; gain = 442.879 ; free physical = 15312 ; free virtual = 17262 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start RTL Component Statistics --------------------------------------------------------------------------------- Detailed RTL Component Info : --------------------------------------------------------------------------------- Finished RTL Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start RTL Hierarchical Component Statistics --------------------------------------------------------------------------------- Hierarchical RTL Component report --------------------------------------------------------------------------------- Finished RTL Hierarchical Component Statistics --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Part Resource Summary --------------------------------------------------------------------------------- Part Resources: DSPs: 220 (col length:60) BRAMs: 280 (col length: RAMB18 60 RAMB36 30) --------------------------------------------------------------------------------- Finished Part Resource Summary --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Cross Boundary and Area Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Cross Boundary and Area Optimization : Time (s): cpu = 00:00:15 ; elapsed = 00:00:17 . Memory (MB): peak = 1386.777 ; gain = 458.891 ; free physical = 15295 ; free virtual = 17246 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start Timing Optimization --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Applying XDC Timing Constraints --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Applying XDC Timing Constraints : Time (s): cpu = 00:00:22 ; elapsed = 00:00:24 . Memory (MB): peak = 1422.781 ; gain = 494.895 ; free physical = 15252 ; free virtual = 17210 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Timing Optimization : Time (s): cpu = 00:00:22 ; elapsed = 00:00:24 . Memory (MB): peak = 1422.781 ; gain = 494.895 ; free physical = 15252 ; free virtual = 17210 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start Technology Mapping --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Technology Mapping : Time (s): cpu = 00:00:22 ; elapsed = 00:00:24 . Memory (MB): peak = 1431.793 ; gain = 503.906 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Flattening Before IO Insertion --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Final Netlist Cleanup --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished IO Insertion : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- Report Check Netlist: +------+------------------+-------+---------+-------+------------------+ | |Item |Errors |Warnings |Status |Description | +------+------------------+-------+---------+-------+------------------+ |1 |multi_driven_nets | 0| 0|Passed |Multi driven nets | +------+------------------+-------+---------+-------+------------------+ --------------------------------------------------------------------------------- Start Renaming Generated Instances --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Instances : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- Report RTL Partitions: +-+--------------+------------+----------+ | |RTL Partition |Replication |Instances | +-+--------------+------------+----------+ +-+--------------+------------+----------+ --------------------------------------------------------------------------------- Start Rebuilding User Hierarchy --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Rebuilding User Hierarchy : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Ports --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Ports : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Handling Custom Attributes --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Handling Custom Attributes : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Renaming Generated Nets --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Finished Renaming Generated Nets : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- --------------------------------------------------------------------------------- Start Writing Synthesis Report --------------------------------------------------------------------------------- Report BlackBoxes: +-+--------------+----------+ | |BlackBox name |Instances | +-+--------------+----------+ +-+--------------+----------+ Report Cell Usage: +------+-----+------+ | |Cell |Count | +------+-----+------+ |1 |LUT2 | 1| |2 |IBUF | 2| |3 |OBUF | 1| +------+-----+------+ Report Instance Areas: +------+---------+-------+------+ | |Instance |Module |Cells | +------+---------+-------+------+ |1 |top | | 4| +------+---------+-------+------+ --------------------------------------------------------------------------------- Finished Writing Synthesis Report : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.797 ; gain = 503.910 ; free physical = 15243 ; free virtual = 17201 --------------------------------------------------------------------------------- Synthesis finished with 0 errors, 0 critical warnings and 0 warnings. Synthesis Optimization Runtime : Time (s): cpu = 00:00:15 ; elapsed = 00:00:16 . Memory (MB): peak = 1431.797 ; gain = 168.504 ; free physical = 15242 ; free virtual = 17201 Synthesis Optimization Complete : Time (s): cpu = 00:00:23 ; elapsed = 00:00:25 . Memory (MB): peak = 1431.801 ; gain = 503.914 ; free physical = 15242 ; free virtual = 17201 INFO: [Project 1-571] Translating synthesized netlist INFO: [Netlist 29-17] Analyzing 2 Unisim elements for replacement INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds INFO: [Project 1-570] Preparing netlist for logic optimization INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s). INFO: [Project 1-111] Unisim Transformation Summary: No Unisim elements were transformed. INFO: [Common 17-83] Releasing license: Synthesis 15 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered. synth_design completed successfully synth_design: Time (s): cpu = 00:00:21 ; elapsed = 00:00:23 . Memory (MB): peak = 1436.797 ; gain = 441.406 ; free physical = 15234 ; free virtual = 17195 INFO: [Common 17-1381] The checkpoint '/home/hakta/myand2/myand2.runs/synth_1/myand2.dcp' has been generated. report_utilization: Time (s): cpu = 00:00:00.09 ; elapsed = 00:00:00.12 . Memory (MB): peak = 1436.797 ; gain = 0.000 ; free physical = 15232 ; free virtual = 17193 INFO: [Common 17-206] Exiting Vivado at Fri Sep 15 11:42:10 2017...