/7-szemeszter/FPGA/myand2/myand2.runs/impl_1/

1 directory 56 files 4.9 MiB total
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Name
Size Modified
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.Xil/
.init_design.begin.rst
161 B
.init_design.end.rst
0 B
.opt_design.begin.rst
161 B
.opt_design.end.rst
0 B
.place_design.begin.rst
161 B
.place_design.end.rst
0 B
.route_design.begin.rst
161 B
.route_design.end.rst
0 B
.vivado.begin.rst
312 B
.vivado.end.rst
0 B
.Vivado_Implementation.queue.rst
0 B
.write_bitstream.begin.rst
161 B
.write_bitstream.end.rst
0 B
gen_run.xml
5.3 KiB
htr.txt
374 B
init_design.pb
3.1 KiB
ISEWrap.js
7.1 KiB
ISEWrap.sh
1.6 KiB
myand2.bit
3.9 MiB
myand2.dcp
200 KiB
myand2.tcl
1.8 KiB
myand2.vdi
24 KiB
myand2_5745.backup.vdi
20 KiB
myand2_clock_utilization_routed.rpt
6.3 KiB
myand2_control_sets_placed.rpt
2.5 KiB
myand2_drc_opted.rpt
1.4 KiB
myand2_drc_routed.pb
37 B
myand2_drc_routed.rpt
1.5 KiB
myand2_drc_routed.rpx
349 B
myand2_io_placed.rpt
117 KiB
myand2_methodology_drc_routed.rpt
1.2 KiB
myand2_methodology_drc_routed.rpx
125 B
myand2_opt.dcp
200 KiB
myand2_placed.dcp
202 KiB
myand2_power_routed.rpt
7.1 KiB
myand2_power_routed.rpx
3.9 KiB
myand2_power_summary_routed.pb
723 B
myand2_route_status.pb
43 B
myand2_route_status.rpt
588 B
myand2_routed.dcp
205 KiB
myand2_timing_summary_routed.rpt
6.9 KiB
myand2_timing_summary_routed.rpx
3.8 KiB
myand2_utilization_placed.pb
224 B
myand2_utilization_placed.rpt
7.5 KiB
opt_design.pb
6.5 KiB
place_design.pb
12 KiB
project.wdf
3.5 KiB
route_design.pb
11 KiB
rundef.js
1.5 KiB
runme.bat
257 B
runme.log
23 KiB
runme.sh
1.0 KiB
vivado.jou
653 B
vivado.pb
149 B
vivado_5745.backup.jou
653 B
write_bitstream.pb
5.5 KiB