Folder Path

/7-szemeszter/FPGA/clock_counter/clock_counter.sim/sim_1/behav/

2 directories 17 files 15 KiB total

	Name	Size	Modified
	Up
	.Xil/	—	05/17/2022 08:09:24 PM +00:00
	xsim.dir/	—	05/17/2022 08:12:49 PM +00:00
	clock_counter_tb.tcl	449 B	05/17/2022 08:12:49 PM +00:00
	clock_counter_tb_behav.wdb	5.1 KiB	05/17/2022 08:12:49 PM +00:00
	clock_counter_tb_vhdl.prj	236 B	05/17/2022 08:12:49 PM +00:00
	compile.log	418 B	05/17/2022 08:12:49 PM +00:00
	compile.sh	278 B	05/17/2022 08:12:49 PM +00:00
	elaborate.log	889 B	05/17/2022 08:12:49 PM +00:00
	elaborate.sh	340 B	05/17/2022 08:12:49 PM +00:00
	simulate.log	48 B	05/17/2022 08:12:49 PM +00:00
	simulate.sh	274 B	05/17/2022 08:12:49 PM +00:00
	webtalk.jou	902 B	05/17/2022 08:12:49 PM +00:00
	webtalk.log	1.3 KiB	05/17/2022 08:12:48 PM +00:00
	webtalk_8641.backup.jou	902 B	05/17/2022 08:12:48 PM +00:00
	webtalk_8641.backup.log	1.3 KiB	05/17/2022 08:12:49 PM +00:00
	xelab.pb	1.8 KiB	05/17/2022 08:12:49 PM +00:00
	xsim.ini	39 B	05/17/2022 08:12:49 PM +00:00
	xvhdl.log	418 B	05/17/2022 08:12:49 PM +00:00
	xvhdl.pb	668 B	05/17/2022 08:12:48 PM +00:00