Folder Path
/
7-szemeszter
/
FPGA
/
blockout
/
blockout.sim
/
sim_1
/
behav
/
xsim.dir
/
xil_defaultlib
/
0
directories
8
files
114 KiB
total
List
Grid
Name
Size
Modified
Up
blockout.vdb
92 KiB
05/17/2022 08:13:10 PM +00:00
blockout_tb.vdb
2.9 KiB
05/17/2022 08:13:09 PM +00:00
clk_100to25@m@hz.sdb
1.1 KiB
05/17/2022 08:13:09 PM +00:00
clk_100to25@m@hz_clk_wiz.sdb
5.5 KiB
05/17/2022 08:13:09 PM +00:00
clk_wiz_0.sdb
1.1 KiB
05/17/2022 08:13:09 PM +00:00
clk_wiz_0_clk_wiz.sdb
5.5 KiB
05/17/2022 08:13:09 PM +00:00
glbl.sdb
4.2 KiB
05/17/2022 08:13:09 PM +00:00
xil_defaultlib.rlx
851 B
05/17/2022 08:13:09 PM +00:00