# compile verilog/system verilog design source files
verilog xil_defaultlib  "../../../blockout.srcs/sources_1/ip/clk_100to25MHz/clk_100to25MHz_clk_wiz.v" --include "../../../blockout.srcs/sources_1/ip/clk_100to25MHz" --include "../../../blockout.srcs/sources_1/ip/clk_wiz_0"
verilog xil_defaultlib  "../../../blockout.srcs/sources_1/ip/clk_100to25MHz/clk_100to25MHz.v" --include "../../../blockout.srcs/sources_1/ip/clk_100to25MHz" --include "../../../blockout.srcs/sources_1/ip/clk_wiz_0"

# compile glbl module
verilog xil_defaultlib "glbl.v"

# Do not sort compile order
nosort