# This file is automatically generated. # It contains project source information necessary for synthesis and implementation. # IP: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0.xci # IP: The module: 'clk_wiz_0' is the root of the design. Do not add the DONT_TOUCH constraint. # XDC: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0_board.xdc # XDC: The top module name and the constraint reference have the same name: 'clk_wiz_0'. Do not add the DONT_TOUCH constraint. set_property DONT_TOUCH TRUE [get_cells inst] # XDC: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0.xdc # XDC: The top module name and the constraint reference have the same name: 'clk_wiz_0'. Do not add the DONT_TOUCH constraint. #dup# set_property DONT_TOUCH TRUE [get_cells inst] # XDC: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0_ooc.xdc # XDC: The top module name and the constraint reference have the same name: 'clk_wiz_0'. Do not add the DONT_TOUCH constraint. #dup# set_property DONT_TOUCH TRUE [get_cells inst] # IP: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0.xci # IP: The module: 'clk_wiz_0' is the root of the design. Do not add the DONT_TOUCH constraint. # XDC: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0_board.xdc # XDC: The top module name and the constraint reference have the same name: 'clk_wiz_0'. Do not add the DONT_TOUCH constraint. #dup# set_property DONT_TOUCH TRUE [get_cells inst] # XDC: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0.xdc # XDC: The top module name and the constraint reference have the same name: 'clk_wiz_0'. Do not add the DONT_TOUCH constraint. #dup# set_property DONT_TOUCH TRUE [get_cells inst] # XDC: /home/hakta/Documents/FPGA/blockout/blockout.srcs/sources_1/ip/clk_wiz_0/clk_wiz_0_ooc.xdc # XDC: The top module name and the constraint reference have the same name: 'clk_wiz_0'. Do not add the DONT_TOUCH constraint. #dup# set_property DONT_TOUCH TRUE [get_cells inst]